Company profile

Ticker
ATOM
Exchange
Website
CEO
Scott A. Bibaud
Employees
Incorporated in
Location
Fiscal year end
Former names
Mears Technologies Inc
SEC CIK

ATOM stock data

(
)

Investment data

Data from SEC filings
Securities sold
Number of investors

Calendar

5 Nov 19
11 Dec 19
31 Dec 19

News

Company financial data Financial data

Quarter (USD) Sep 19 Jun 19 Mar 19 Dec 18
Revenue 254K 70K 71K 150K
Net income -3.09M -3.63M -3.53M -3.2M
Diluted EPS -0.19 -0.24 -0.24 -0.22
Net profit margin -1215% -5191% -4977% -2133%
Operating income -3.18M -3.72M -3.62M -3.29M
Net change in cash -2.32M 3.98M -3.8M 8.98M
Cash on hand 16.8M 19.12M 15.14M 18.93M
Cost of revenue 204K 20K 0 35K
Annual (USD) Dec 18 Dec 17 Dec 16 Dec 15
Revenue 246K 110K 0
Net income -12.9M -13.07M -12.61M -9.51M
Diluted EPS -1.02 -1.11 -2.22 -7.55
Net profit margin -5243% -11880%
Operating income -13.13M -13.21M -10M -5.5M
Net change in cash 1.56M -9.35M 23.52M
Cash on hand 18.93M 17.37M 26.72M 3.2M
Cost of revenue 148K 39K 0

Financial data from Atomera earnings reports

Financial report summary

?
Management Discussion
  • Item 2. Management’s Discussion and Analysis of Financial Condition and Results of Operations
  • We are engaged in the business of developing, commercializing and licensing proprietary processes and technologies for the $450+ billion semiconductor industry. Our lead technology, named Mears Silicon TechnologyTM, or MST®, is a thin film of reengineered silicon, typically 100 to 300 angstroms (or approximately 20 to 60 silicon atomic unit cells) thick. MST can be applied as a transistor channel enhancement to CMOS-type transistors, the most widely used transistor type in the semiconductor industry. MST is our proprietary and patent-protected performance enhancement technology that we believe addresses a number of key engineering challenges facing the semiconductor industry. We believe that by incorporating MST, transistors can be made smaller, with increased speed, reliability and energy efficiency. In addition, since MST is an additive and low-cost technology, we believe it can be deployed on an industrial scale, with machines commonly used in semiconductor manufacturing. We believe that MST can be widely incorporated into the most common types of semiconductor products, including analog, logic, optical and memory integrated circuits.
  • We do not intend to design or manufacture integrated circuits directly. Instead, we intend to develop and license technologies and processes that we believe will offer the designers and manufacturers of integrated circuits a low-cost solution to the industry’s need for greater performance and lower power consumption. Our customers and partners are expected to include:
Content analysis ?
Positive
Negative
Uncertain
Constraining
Legalese
Litigous
Readability
H.S. sophomore Avg
New words: accrual, tool
Removed: partially, Registration

Patents

GRANT
Utility
Semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice
5 Nov 19
A semiconductor device may include a substrate including a first Group IV semiconductor having a recess therein, an active layer comprising a Group III-V semiconductor within the recess, and a buffer layer between the substrate and active layer and comprising a second Group IV semiconductor.
GRANT
Utility
Method for making CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk
29 Oct 19
A method for making a CMOS image sensor may include forming a plurality of laterally adjacent photodiodes on a semiconductor substrate having a first conductivity types by forming a retrograde well extending downward into the substrate from a surface thereof and having a second conductivity type, forming a first well around a periphery of the retrograde well also having the second conductivity type, and forming a second well within the retrograde well having the first conductivity type.
GRANT
Utility
Semiconductor device including resonant tunneling diode structure having a superlattice
22 Oct 19
A semiconductor device may include at least one double-barrier resonant tunneling diode (DBRTD).
APP
Utility
Semiconductor Device Including Vertically Integrated Optical and Electronic Devices and Comprising a Superlattice
17 Oct 19
A semiconductor device may include a substrate having waveguides thereon, and a superlattice overlying the substrate and waveguides.
APP
Utility
Method for Making an Inverted T Channel Field Effect Transistor (Itfet) Including a Superlattice
17 Oct 19
A method for making a semiconductor device may include forming an inverted T channel on a substrate, with the inverted T channel comprising a superlattice.