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UNITED STATES SECURITIES AND EXCHANGE COMMISSION
WASHINGTON, D.C. 20549
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FORM 10-K
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[X] ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE
ACT OF 1934 FOR THE YEAR ENDED SEPTEMBER 30, 1999OCTOBER 31, 2000
OR
[ ] TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES
EXCHANGE ACT OF 1934
COMMISSION FILE NUMBER 0-45138
SYNOPSYS, INC.
(EXACT NAME OF REGISTRANT AS SPECIFIED IN ITS CHARTER)(Exact name of registrant as specified in its charter)
DELAWARE 56-1546236
(STATE OR OTHER JURISDICTION OF(State or other jurisdiction of (I.R.S. EMPLOYER
INCORPORATION OR ORGANIZATION) IDENTIFICATION NO.Employer Identification No.)
incorporation or organization)
700 EAST MIDDLEFIELD ROAD, MOUNTAIN VIEW, CALIFORNIA 94043
(ADDRESS OF PRINCIPAL EXECUTIVE OFFICES)(Address of principal executive offices)
(650) 962-5000
(REGISTRANT'S TELEPHONE NUMBER, INCLUDING AREA CODE)584-5000
Registrant's telephone number, including area code
SECURITIES REGISTERED PURSUANT TO SECTION 12(b) OF THE ACT: NONE
SECURITIES REGISTERED PURSUANT TO SECTION 12(g) OF THE ACT:
COMMON STOCK,Common Stock, $0.01 PAR VALUE
PREFERRED SHARE PURCHASE RIGHTSpar value
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Preferred Share Purchase Rights
Indicate by check mark whether the registrant (1) has filed all reports
required to be filed by Section 13 or 15(d) of the Securities Exchange Act of
1934 during the preceding 12 months (or for such shorter period that the
registrant was required to file such reports), and (2) has been subject to such
filing requirements for the past 90 days.[X] Yes [X] No [ ] No
Indicate by check mark if disclosure of delinquent filers pursuant to
Item 405 of Regulation S-K is not contained herein, and will not be contained,
to the best of registrant's knowledge, in definitive proxy or information
statements incorporated by reference in Part III of this Form 10-K or any
amendment to this Form 10-K. [ ]
The aggregate market value of voting stock held by non-affiliates of the
registrant as of December 1, 1999,January 2, 2001, was approximately $1,868,530,386.$2,314,010,470
On December 1, 1999,January 2, 2001, approximately 71,379,42771,511,053 shares of the registrant's
Common Stock, $0.01 par value, were outstanding.
DOCUMENTS INCORPORATED BY REFERENCE
Portions of the registrant's Notice of Annual Meeting and Proxy
Statement for the registrant's annual meeting of stockholders to be held on
March 3, 2000April 6, 2001 are incorporated by reference into Part III hereof.
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SYNOPSYS, INC.
ANNUAL REPORT ON FORM 10-K
YEAR ENDED OCTOBER 31, 2000
TABLE OF CONTENTS
PAGE NO.
PART I .................................................................................................... 3
Item 1. Business ........................................................................................ 3
Item 2. Properties ...................................................................................... 14
Item 3. Legal Proceedings ............................................................................... 14
Item 4. Submission of Matters to a Vote of Security Holders ............................................. 14
PART II ................................................................................................... 16
Item 5. Market for Registrant's Common Equity and Related Stockholder Matters ........................... 16
Item 6. Selected Financial Data ......................................................................... 16
Item 7. Management's Discussion and Analysis of Financial Condition and Results of Operations
Results of Operations ........................................................................... 17
Item 7A. Quantitative and Qualitative Disclosure About Market Risk ...................................... 27
Item 8. Financial Statements and Supplementary Data ..................................................... 28
Item 9. Changes in and Disagreements with Accountants on Accounting and Financial Disclosure ............ 51
PART III .................................................................................................. 51
Item 10. Directors and Executive Officers of the Registrant ............................................. 51
Item 11. Executive Compensation ......................................................................... 51
Item 12. Security Ownership of Certain Beneficial Owners and Management ................................. 51
Item 13. Certain Relationships and Related Transactions ................................................. 51
PART IV ................................................................................................... 51
Item 14. Exhibits, Financial Statements, Schedules and Reports on Form 8-K .............................. 51
SIGNATURES ................................................................................................ 55
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PART I
This Form 10-K, including "Item 1. Business," includes forward-looking
statements within the meaning of Section 21E of the Securities Exchange Act of
1934. These statements include, but are not limited to, statements concerning:
the Company's business strategy; the Company's plans to expand its consulting
services business; the Company's expansion into the market for physical design
tools; the Company's intention regarding expansion of its
offerings of system level design and
verification tools; the Company's intention regarding design reuse tools and
techniques; the Company's expectations regarding research and development, sales
and marketing, and general and administrative expenses; the Company's efforts to
enhance its existing products and develop or acquire new products; and the
Company's requirements for working capital. The Company's actual results could
differ materially from those projected in the forward-looking statements as a
result of risks and uncertainties that include, but are not limited to, those
discussed under the caption "Factors That May Affect Future Results" under
"Management's Discussion and Analysis of Financial Condition and Results of
Operations" included in Part II, Item 8 hereto, as well as factors discussed
elsewhere in this Form 10-K.
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SYNOPSYS, INC.
ANNUAL REPORT ON FORM 10-K
YEAR ENDED SEPTEMBER 30, 1999
TABLE OF CONTENTS
PAGE
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PART I
Item 1. Business.................................................... 4
Item 2. Properties.................................................. 15
Item 3. Legal Proceedings........................................... 15
Item 4. Submission of Matters to a Vote of Security Holders......... 15
PART II
Item 5. Market for Registrant's Common Equity and Related
Stockholder Matters......................................... 18
Item 6. Selected Financial Data..................................... 18
Item 7. Management's Discussion and Analysis of Financial Condition
and Results of Operations................................... 19
Item 7A. Quantitative and Qualitative Disclosure About Market Risk... 29
Item 8. Financial Statements and Supplementary Data................. 31
Item 9. Changes in and Disagreements with Accountants on Accounting
and Financial Disclosure.................................... 53
PART III
Item 10. Directors and Executive Officers of the Registrant.......... 53
Item 11. Executive Compensation...................................... 53
Item 12. Security Ownership of Certain Beneficial Owners and
Management.................................................. 53
Item 13. Certain Relationships and Related Transactions.............. 53
PART IV
Item 14. Exhibits, Financial Statements, Schedules and Reports on
Form 8-K.................................................... 53
SIGNATURES............................................................ 57
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PART I
ITEM 1. BUSINESS
INTRODUCTION
Synopsys, Inc. ("Synopsys" or the "Company") is a leading supplier of
electronic design automation (EDA) software to the global electronics industry.
The Company develops, markets, and supports a wide range of integrated circuit
(IC) designCompany's products that are used by designers of advanced ICs,integrated circuits (ICs),
including system-on-a-chip ICs, and the electronic products (such as computers,
cell phones, and internet routers) that use such ICs.ICs to automate significant
portions of their chip design process. ICs are distinguished by the speed at
which they run, their area, the amount of power they consume and the cost of
production. The Company's products offer its customers the opportunity to design
ICs that are optimized for speed, area, power consumption and production cost,
while reducing overall design time. The Company also provides consulting
services to help itsassist customers improve their IC design processes and,
where requested, to assist them with their IC designs. The Company's products
and services offer its customers the opportunity to reduce the time to market
for new products and reduce IC development and manufacturing costs by improving
the productivity of their IC designers and enhancing their design quality of
results. Synopsys also providesdesigns, as well as training and
support services for its customers.services. Synopsys was incorporated in Delaware in 1987.
THE ROLE OF EDA IN THE ELECTRONICS INDUSTRY
Over the past three decades, technology advances in the semiconductor
industry have dramatically increased the size, speed and capacity of ICs:
- The number of transistors that can be placed on a chip and reduced the cost of manufacturing each chip.has doubled
roughly every 18 months. A state-of-the-art IC may havehold over 20
million transistorstransistors. This is made possible in large part because the
width of the features on itthe chip is steadily shrinking. Most ICs
today are produced at 0.35 micron or 0.25 micron. Over the next
several years, the bulk of production will shift to 0.18 micron, and
may runthen to 0.13 micron or below.
- The speed at 1which chips operate has steadily increased.
Microprocessors operating at 1.4 gigahertz, a speed that was unheard
of even twoa few years ago.ago, are available today.
- Chips are also becoming more economical in their power consumption,
which is necessary to drive more and more powerful handheld devices.
- Increasingly, functions that formerly were performed by multiple ICs
attached to a printed circuit board are being combined in a single
chip, referred to as a system-on-a-chip.
The increased capacity of ICs hasCombined, these changes have fostered the development of computers,
internet routers, wireless communications networks, hand-held personal digital
assistants, and many other goods and services with tremendous capabilities at
relatively low cost.
In the current economic environment, competition and continuing
innovation have shortened the life cycle of electronic products, so
time-to-market is crucial to the success of a product. The growing complexity of advanced ICs
threatenTime to lengthenmarket can in
large part be determined by the development cycle for new products, however.time it takes to design the chip that will run
such product. EDA products play a critical role in reducing time-to-market for
new products by providing IC designers with tools and techniques to (a) reduce
the time and manual effort required to design, analyze and verify individual
ICs, (b) improve the performance and density of complex IC designs and (c)
enhance the reliability of the IC design and manufacturing process.
Successfully exploitingTHE DESIGN PROCESS
In simplified form, the increased potentialdesign of ICs presents challengesan integrated circuit consists of five
basic steps:
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System Design. First, a designer describes the functions that the chip
is to perform in a specialized high level computer language. During this phase,
designers perform high level architectural design tradeoffs, to determine, for
example, which algorithms to use to implement the semiconductordesign, and electronics industries. IC designers face bothwhat portions of
the design to implement in hardware and what portions in software. At the
completion of this phase, the designer produces a "designer productivity gap""register transfer language"
or "RTL" description of the chip. Most of this process is completed manually,
although there is a small but growing market for products that help automate
design and verification at the system level.
Logic Synthesis. After the designer is satisfied with the RTL code, a
"silicon performance gap." The designer
productivity gap occurs because chip capability is increasing faster thanlogic synthesis program converts the supplyRTL code into a logical diagram of IC designers with skillsthe
chip. Related programs insert the circuitry that will be required to exploittest the
chip after manufacture. A "gate level" (so called because it describes the
various logic blocks, or gates, required to implement the chip) data file is
produced. In a growing number of designs, the logic synthesis phase is performed
together with a portion of physical design. This combined process, known as
"physical synthesis" produces a file containing "placed gates", which describes
the logic blocks and includes information about where they will be physically
located, or "placed", on a chip. See discussion below under "Current Issues
Facing IC Designers".
High Level Verification. At this stage the designer uses simulation and
related programs to verify that capability. EDA
products help increase the productivity of designers by allowing them to
describe their designs using an abstract, or "high level" design language (as
opposed to describing the design atsuccessfully performs the transistor level), and then
automatically derivingfunctions
that the detailed final design fromdesigner intended, by feeding an exhaustive array of potential inputs
into a specialized program, "simulating" the higher level
description. EDA products also permit designers to analyze and verify the
performancefunctioning of the chip usingas
designed, and checking to confirm that the outputs match what was expected. The
designer also uses a timing analysis program to confirm that the chip as
designed will operate at the speed the designer intended.
Physical Design. If the designer is satisfied with the results of high
level design languages. Additionally, asverification, the electronics industry increasingly produces system-on-a-chip ICs, the EDA
industry is developing toolstransistors, and techniques for reusing existing IC designs and
integrating disparate IC blocks onto a single chip, both of which offer the
potential for significant time savings in the design cycle.
The silicon performance gap occurs because the design effort required to
develop a chip that fully exploits a new semiconductor technology increases as
the sizeall of the transistors shrink. A gap has developedwires connecting each one of
them, are mapped out in a series of transformations that gradually gets more and
more detailed. First the location on the chip die of each block of the chip and
each transistor within each block is determined -- a process known as
"placement" -- then all of the connections between the potential
performance enabled by new semiconductor technology and the performancetransistors are
determined -- a process known as "routing". The result is one or more data files
that can be "designed in"read by EDA tools.physical verification programs (see below) or by the
equipment used to manufacture the chip.
Physical Verification. Before sending the design data file to a chip
manufacturer for fabrication, a further verification step is undertaken. The
designer must confirm that the chip as placed and routed will operate at the
speed anticipated during the logic design phase. The designer also must check
for unintended electrical effects that may arise as a consequence of placing
certain portions of the chip, or routing certain of its "wires", too close
together or in a bad position. Finally, the designer must verify that the final
design complies with all of the design rules set forth by the party that will
manufacture the chip.
The foregoing discussion has been greatly simplified. In the actual
design of a chip each of these steps has a number of different elements. The
steps, or the different elements within the steps, may be undertaken in a
different order or repeated one to multiple times. In any event, if at any stage
of the process the chip does not perform as intended, then the designer must go
back one or more steps to either redesign the RTL, redesign the logic, re-run
the verification or redo the physical design of the chip. Each iteration takes
time, and the more time the process takes, the more difficult it will be for the
designer to meet his or her time to market goals.
CURRENT ISSUES FACING IC DESIGNERS
As ICs have increasedchip technology continues to advance, and particularly as the
state-of-the-art in complexitychip design moves to 0.18 micron and transistor sizes have dropped, the problems faced by IC designers have changed.
In particular, ensuringbelow, Synopsys'
customers are facing a number of difficult design challenges:
Timing Closure. Ensuring that a chip will run at the desired speed
has becomebecomes substantially more difficult.difficult as transistor sizes move to 0.18 micron and
below. At larger transistor feature sizes, IC designers could use standard
estimates of chip timing during the logic design phase, and be confident that
the timing characteristics would be preserved through the physical design phase.
At smaller chip sizes,0.18 micron and below, these estimates arebecome more and more unreliable. As
a result,To
address this problem, customers will increasingly need products (referred to in
the EDA industry as "physical synthesis" products) that integrate logic design
and physical design. Synopsys 4
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and other EDA companies have introduced a new generation of products that
address the timing problem by incorporatingphysical synthesis solution takes physical design
information withinto account during logic design, and produces a file containing
"placed gates". Physical synthesis provides more accurate timing estimates intoat
the logic design phase and greatly improving the correlation between original
timing estimates after logic design and timing results after physical design.
Verification. Verification is the process of IC design. Other
physical phenomena that increasingly must be considered earlier inensuring, at various stages
of the design process, include power consumption, cross-talk, and metal migration into an IC
design. The EDA industry is also developing products that take these phenomena
into account earlier ina chip will perform as intended. As the number of
transistors on a chip grows, the verification problem grows geometrically. In
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fact, with today's chips, verification often takes up the single largest
proportion of the overall design process. As system-on-a-chipVerification products must offer
customers a combination of speed, accuracy and the ability to focus on the
portions of the chip most likely to cause problems.
Designer Shortage. Finding, hiring and retaining qualified design
engineers is often the most difficult problem that our customers face. Without
enough designers it is difficult for a company to meet ambitious development
schedules, and to get its products to market in a timely manner. Companies
address this shortage in a variety of ways, including seeking to import
designers from outside of the United States, locating development efforts
offshore and outsourcing all or parts of their design work. For EDA companies
the shortage of designers creates opportunities for companies that offer
pre-designed, pre-verified design "building blocks" that can be re-used in
multiple designs, become
more prevalent, the development of these types of tools will grow more important
in closing the silicon performance gap.and that offer professional services to augment their
customers design teams.
SYNOPSYS PRODUCT OVERVIEW
Synopsys provides products and services that help customers meet the
challenges of producingdesigning leading edge ICs and the products that incorporate them.
Synopsys' design tools include an extensive lineSynopsys offers a comprehensive suite of logic synthesis and system
design and analysis softwarerelated
products that allow an IC designer to describe chip behavior in a high-level
language and convert that description into a gate-level
representation, and analyzemap of the expected performancelogic implementing such
chip, including circuits that facilitate testing of the chip at the
gate-level. Synopsys' design tools also include tools to facilitate testing of
an IC after the ICit is built, as well as design reuse products that help reduce
design time by permitting the straight-forward reuse of previously-proven
circuit "blocks."fabricated.
During fiscal 1999 and fiscal 2000, Synopsys also provides semiconductor libraries for IC vendors
and their customers.
Synopsys has recently extended its design tools
product line to include several products targeted at the "back end," or physical design portion
of the IC design process. Rather than producing a standalone physical design
product, Synopsys has not previously offeredis focusing on physical synthesis products, in this portion
of the EDA market.which integrate
logic design and physical design. In fiscal 1999,2000, Synopsys formally introduced Chip Architect, a design
planning tool -- which incorporates floorplanning, placement, and global
routing, and FlexRoute, a top-level router. Synopsys also commenced extensive
customer testing of
Physical Compiler, athe principal product that unifiesin our physical synthesis suite, which
integrates synthesis, placement and global routing which was introduced early in fiscal 2000.routing.
Synopsys' high level and physical verification products are used by IC
designers in several stages of the system
and IC design process to ensure that the
resulting IC performs the function that the IC designer intended. Synopsys'
simulation products permit IC designers to simulate their designs at various levels of abstraction (behavioral, register
transfer, gate-level, and switch logic level) and to explore
tradeoffs between incorporating functionality in hardware or software. Synopsys
is also offers a leading
providersuite of products that help designers focus on the most
problematic portions of their chips. And to help customers analyze other aspects
of chip performance, Synopsys offers an extensive line of software tools to
analyze power, timing and reliability concerns in an IC design at the RTL, gate
and transistor level.
Synopsys provides the broadest array of reusable design building blocks
of any company in the EDA and intellectual property (IP) industry. The Company's
IP products also include software and hardware models, which are used to test an
IC design within the context of the system in which the IC will eventually be
used.
In
addition, Synopsys also offers an extensive line of software tools to analyze power,
timing and reliability concerns in an IC design at the transistor level.
Synopsys offers its customers an extensive arraya full range of professional services which can be tailored to meethelp
customers improve their specific needs. Theseinternal design methodologies, as well as design
services may include
methodology consulting, aimed at helping a customer improve its design process;
design reuse consulting, which helps a customer modify its inventory of designsranging from specialized assistance to facilitate their reuse in newer designs; and design assistance, which helps a
customer design, verify or test a discreet portion of a chip or an entire chip.
The Companyturnkey design.
Synopsys markets its products on a worldwide basis and offers
comprehensive customer service, education, consulting, and support as integral
components of its product offerings. Products are marketed primarily through its
direct sales force. The CompanySynopsys has licensed its products to manymost of the world's
leading semiconductor, computer, communications and electronics companies.
STRATEGY
Synopsys' strategy is to develop and offer to its customers ana broad
array of tools and methodologiesservices required to enable design of complex ICs, especially
system-on-a-chip ICs. The Company is seeking to enhance the performance and
broaden the range ofbuild on its current products,market
position to help customers address the most pressing problems of IC design at
0.18 micron and to increase its ability to
provide consulting services to its customers, while expanding in three principal
directions.below: timing closure, verification, and the shortage of skilled
designers. First, building from its historical base of strength in high level
design, Synopsys plans to continuehelp customers address the timing closure problem by
continuing its expansion into the market for physical design tools.synthesis products --
products that integrate logical and physical design. Second, Synopsys will seek
to expandhelp customers address their verification needs by building a comprehensive
offering of verification products around its offeringscurrent position in simulation,
test and timing analysis. Third, Synopsys intends to help customers address the
designer shortage by expanding its inventory of tools for
system levelreusable design building blocks,
which will allow customers to focus their own design teams on areas of
competitive differentiation, and verification, a market the Company believes offers the
potential for significant growth over the long term. Third, Synopsysby expanding its capacity to offer professional
services to supplement customers' own design teams.
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intends to continue to develop tools and techniques for promoting design reuse,
which the Company believes will become increasingly important to the successful
design of large system-on-a-chip ICs.
ORGANIZATION AND PRODUCTS
Synopsys is currently organized into two product development groups --products and services are focused on the Design Tools Groupprinciple needs of IP
and the High-Level Verification Group --systems designers, and a services
group -- the Professional Services Group.
DESIGN TOOLS GROUP
The Design Tools Group (DTG) produces a variety of products that are used
throughout the IC design flow, from initial system-level design to final
transistor level analysis. DTG's offerings include synthesis, design planning,
placement and routing products, plus transistor level analysis and verification
products (as a result of the combination of the former EPIC Technology Group
with DTG during fiscal 1999). As of the end of fiscal 1999, DTG wascan be divided into five business units.
Physical Synthesis Business Unit
The Physical Synthesis Business Unitcategories -- IC
Implementation, Verification and Test, IP and Systems Design, Transistor Level
Design and Professional Services. These products included in these categories
are discussed below. Financial information regarding these products is responsibleincluded
under Item 7 --Management's Discussion and Analysis of Financial Condition and
Results of Operation -- Results of Operation -- Revenue -- Product Groups".
IC Implementation Products
Synopsys' IC Implementation products include the Company's basic logic
synthesis and related products, and the Company's new physical synthesis
products.
During fiscal 2000, IC Implementation products accounted for development39% of the
Company's new Physical Synthesis initiative. Physical Synthesis unites logic
synthesis, placement and routing and links them together with common timing.
Physical Synthesis incorporates several of the Company's existing products with
a number of new products. When used together, these products provide customers
with an integrated design flow from register transfer level
(RTL)-to-placed-gates, and address the critical timing problems encountered in
designing advanced ICs and systems-on-a-chip.revenues.
Logic synthesis is the process by which a high-level description of
desired chip functions is mapped into a connected collection of logic gates and
other circuit elements that performs the desired functions. Design Compiler(TM)
is the market-leading logic synthesis tool and is used by a broad range of
companies engaged in the design of ICs to optimize their designs for performance
and area. Design Compiler was introduced in 1988 and has been updated regularly
since then. The Company's Design Compiler product family also includes Power
Compiler and Module Compiler. Power Compiler provides "push-button" power
optimization and early analysis for the design of low power circuits, which are
key for the design of hand-held devices. Module Compiler is used in the design
of complex datapaths.
In fiscal 1999,2000, Synopsys released Design Compiler(TM) 992000 as the latest
generation in the Design Compiler family. Design Compiler 992000 features
significant enhancements, including a significant reduction in run time; anintegration of datapath synthesis technology
from the Company's Module Compiler product, enhanced design-for-test
capabilities, and improved links-to-layout methodology for multi-million-gate designs; and
automated chip synthesis, which speeds turnaround times by using parallel
computing. In addition, Synopsys has introduced a new high-end versionquality of Design
Compiler, called Design Compiler Ultra (DC Ultra(TM)), which includes all
features of Design Compiler plus additional capabilities that are focused on
arithmetic-intensive and pipelined designs.results. In the Company's Physical Synthesis
initiative,physical
synthesis suite of products, Design Compiler will continue to be used for
synthesis of non-timing-critical blocks.portions of a design.
Physical synthesis unites logic synthesis, placement and top level
routing and links them together with common timing. When used together, the
physical synthesis suite of products provides customers with an integrated
design flow from register transfer level (RTL) through placement and top level
routing, and addresses the critical timing problems encountered in designing
advanced ICs and systems-on-a-chip. In fiscal 1999,2000, Synopsys formally released
Physical Compiler, a next-generation product aimed at designing ICs at 0.18
micron and below. Physical Compiler unifies synthesis and placement into a
single product to provide high-quality timing closure capability for the
individual blocks large IC designs. Physical Synthesis Business Unit releasedCompiler is marketed to customers
as an upgrade to Design Compiler, and shares with Design Compiler a common
database, user model, constraints, timer and libraries.
As of January 15, 2001, Physical Compiler had been licensed to over 70
customers and more than 70 IC designs had been completed using Physical
Compiler. During fiscal 2000 the first two
newCompany received approximately $57 million in
orders for Physical Compiler.
The physical synthesis suite of products of the Physical Synthesis initiative --also includes Chip Architect
and FlexRoute(TM).FlexRoute. Chip Architect is a hierarchical design planner, which takes into
account physical phenomena and is used at various stages of the system-on-a-chip
design process to perform chip levelchip-level estimation, floor planning,floor-planning, timing analysis
and placement. FlexRoute is a high-capacity, object-based, top-level router,
which is used to route the longest, most difficult to routemost-difficult-to-route connections between
functional blocks on a system-on-a-chip. FlexRoute is "object-based" and permits
true gridless routing, which enables chip designers to address issues such as
cross-talk, delay and signal integrity, while optimizing chip area.
During fiscal 1999, the Company and certain customers extensively tested
Physical Compiler, a product that unifies synthesis and placement and is used
for the design of timing-critical functional blocks on a system-on-a-chip.
Physical Compiler was formally announced in November 1999.
The Physical Synthesis suite ofCompany's IC Implementation products also includes Module Compiler(TM)
(which is used for synthesizing datapaths). The common timing engine for the
Physical Synthesis initiative comes from the Company's PrimeTime product, which
is described below.
The Physical Synthesis Business Unit also offers other tools to provide
designers with a comprehensive design environment. RTL Analyzer(TM) lets IC
designers analyze and improve their source code before
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synthesis and simulation runs. Power Compiler(TM) allows designers to optimize
their designs for power consumption.
Nanometer Analysis and Test Business Unit
The Nanometer Analysis and Test Business Unit develops a range of products
for gate-level timing analysis and functional verification, design for test, and
transistor-level analysis and verification.
Static Timing Analysis, Formal Verification and Test. Accurate analysis of
timing is critical to ensuring successful chip design. PrimeTime(R) is a
full-chip, gate-level static timing analysis tool that provides
application-specific integrated circuit (ASIC) customers with essential design
verification capabilities. PrimeTime ensures that as a design advances from
synthesis (high-level design) to gate-level implementation, all timing-critical
paths in the chip can be clearly understood and verified.
Formality(R) is a formal verification product that lets IC designers
compare different stages of a design to determine whether they are functionally
equivalent. Thus, assuming that the original design was functionally correct,
Formality permits the designer to detect errors introduced during implementation
of the design. Historically, such errors were detected by simulating the
modified design using patterns validated with the functionally correct design.
This approach is time-consuming. Formality provides an alternative method for
detecting any functional differences without simulating the design, accelerating
the detection of errors. Formality is tightly integrated with PrimeTime and
Design Compiler. When used together as part of Synopsys' verification
methodology, these tools can reduce the number of gate-level simulation runs,
enabling designers to complete their designs faster and with a higher level of
confidence.
Synopsys' 1-Pass Test Synthesis solution, DC Expert Plus(TM), is a
design-for-test product that allows users to add, starting at the RTL level, the
needed scan circuits for efficient, high coverage testing of the chip after
manufacturing. This way, as part of the synthesis process, the test-related
circuits are inserted taking into account all the needed constraints, such as
timing, in one pass. By moving these critical test activities to a much earlier
stage in the design process, we are able to generate these circuits in an easy
and predictable fashion.
TetraMAX(TM) APTG is an automatic test pattern generation solution
optimized for speed, capacity, coverage, vector compaction and ease-of-use. The
TetraMAX APTG product, announced in fiscal 1999, works in concert with Synopsys'
DC Expert Plus.
Synopsys also provides software to help customers design into their ICs
features to facilitate the testing of chips after manufacture. This reduces the
need for the time-consuming and expensive post-fabrication tests to which ICs
are subjected to determine if they are free of manufacturing defects.
Transistor-Level Analysis and Verification. Advanced electronics
products -- most notably in the consumer electronics and wireless communications
markets -- require chips that operate at very high speeds, use very little power
and last for an extended period of time. Designers of the complex ICs used in
these devices rely heavily on analysis and verification tools that operate at
the transistor level. Synopsys offers its customers a complete line of
transistor-level tools -- characterization, simulation, modeling, analysis,
extraction and physical verification -- which enable designers to address
timing, power, and reliability requirements of mixed signal, high performance
and low power ICs.
Transistor-level analysis and verification is important for two principal
reasons. First, speed, power consumption and reliability often require
tradeoffs -- for example, fast chips tend to consume more power and thus produce
more heat (which hurts reliability) than slower chips. It is at the transistor
level that the designer has the last chance to optimize a design for speed,
power and reliability, and the last chance to analyze and correct design flaws
that can result in the failure of a chip to function as intended. Second, as ICs
become more powerful and more complex, the size of the transistors and wires in
those ICs shrink below one quarter micron (250 nanometers) and the total length
of wire connecting the transistors lengthens to as much as one mile. At these
dimensions, ICs exhibit unique electrical effects; having the ability to analyze
these effects is central to the success of an advanced IC design.
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Synopsys' principal transistor-level analysis and verification tools
include:
PathMill(R) provides a detailed critical path analysis and static timing
verification capability. PathMill provides accurate and flexible modeling for
transistor level static timing analysis. PathMill's behavioral-, gate- and
transistor-level models allow accurate analysis at each level of the design
hierarchy, allowing the user to mix top-down design and bottom-up
implementation.
PowerMill(R) simulates block and full chip current and power behavior,
providing fast and accurate current and power analysis, and diagnostics.
PowerMill offers static and dynamic diagnostics to identify design flaws that
cause unnecessary power consumption. After layout, PowerMill helps designers
confirm that power consumption is acceptable before committing the design to
silicon.
Arcadia(R) provides full chip and net-by-net resistance and capacitance
(RC) extraction, permitting designers to focus design analysis effort on
critical paths. Arcadia offers a distributed processing capability that enables
designers to extract and analyze data from very large designs in a short time.
TimeMill(R) is a transistor-level simulator and dynamic timing analyzer. In
the prelayout phase, TimeMill helps designers optimize the performance of
transistor-level blocks, memories and data paths. TimeMill allows designers to
quickly explore changes in voltage levels, temperature or process parameters and
to detect problems such as charge sharing and race conditions.
The Analog Circuit Engine (ACE(TM)) is an analog simulation option
available for TimeMill and PowerMill tools. ACE provides a high-speed, accurate,
mixed analog/digital circuit simulation solution.
The Nanometer Analysis and Test Business Unit also offers the Direct
Silicon Access(TM) silicon characterization services (DSA), which provide
accurate models for nanometer processes to customers. The DSA methodology
correlates expected chip behavior with measurements performed on actual silicon
test circuits, which then provides a reliable source of data for customers to
create accurate technology files for RC extraction and circuit simulation tools.
System Level Design Business Unit
The System-Level Design Business Unit offers three principal products:
COSSAP(R) is a digital signal processing (DSP) design system targeted at
designers of digital communications devices such as third generation wireless
phones. COSSAP can simulate large, complex systems that would be hard to model
with standard cycle-based or event-driven simulators. COSSAP includes a
comprehensive library of DSP and digital communications building blocks.
Behavioral Compiler(TM) is a synthesis tool that enables designers to
create complex circuits from a higher level of abstraction than Design Compiler
does, thus dramatically accelerating the design cycle. Behavioral Compiler
allows designers to quickly create different implementations of a design,
enabling them to spend more time evaluating tradeoffs in areas such as
performance, size, and power consumption before committing to a particular
implementation.
Protocol Compiler(TM) facilitates the design and implementation of protocol
control logic -- a critical aspect of asynchronous transfer mode (ATM),
Synchronous Optical Network (SONET) and Synchronous Digital Hierarchy (SDH)
equipment for networking and telecommunications applications. Protocol Compiler
enables control logic design at the behavioral level, generating output that is
optimized for Synopsys' flagship Design Compiler tool. By taking protocol
control logic design up to the behavioral level, Protocol Compiler greatly
simplifies the process of designing complex chips targeted at networking
applications.
In 1999, Synopsys introduced SystemC, which promotes and accelerates the
exchange of system-level intellectual property (IP) and executable
specifications by providing a common C++ modeling platform. Designers can
create, validate and share models with other companies using SystemC and a
standard ANSI C++ compiler. In addition, EDA vendors have complete access to the
SystemC modeling platform required to build interoperable tools. There are no
licensing fees associated with the use of SystemC, and any company is free to
join and participate. Backed by over 60 charter member companies, the Open
SystemC Initiative
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includes representation from the systems, semiconductor, IP, embedded software
and EDA industries. The steering group includes ARM, CoWare, Inc., Cygnus
Solutions, Ericsson, Fujitsu, Infineon, Lucent Technologies, Sony,
STMicroelectronics, Synopsys and Texas Instruments.
FPGA Business Unit
The FPGA Business Unit providesinclude logic synthesis
products for field programmable gate arrays (FPGAs) and complex programmable
logic devices (CPLDs). With the advent of high densityhigh-density chips (.25 micron and
below), FPGAs became dense
andhave become fast enough in 1999 to handle a substantial fraction of
projects that previously required mask-programmed ASICs.application specific
integrated circuits (ASICs). Furthermore, FPGAs' unique ability to deliver very
quick time-to-market make them attractive in today's business environment. As a result, programmable logic is currently a small, but
fast-growing part of the semiconductor market. In
fiscal 1999,2000, Synopsys announced new versions of FPGA Express(TM) and FPGA
Compiler II(TM).
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Verification and Test Products
The latterCompany's Verification and Test products consist of a group of
tools, including simulation, test automation and timing verification products,
to enable IC designers to quickly and reliably verify the behavior of a design
before it is committed to the expensive and time-consuming process of IC
fabrication, and to assist in the testing of the chip after manufacturing.
During fiscal 2000, Verification and Test products accounted for 30% of
the Company's revenues.
Simulation and related products. Simulation software "exercises" an IC
design by running it through a series of tests and comparing the actual outputs
from the design with the expected output. As such, simulation products are the
key products for functional verification. The goal of simulation is to make sure
that the functionality and timing performance of the design meets the original
specifications of the chip. Synopsys offers two products for high-level
simulation: VCS(TM), for designs written in Verilog (one of the two principal
register transfer languages) and Scirocco(TM), for designs written in VHDL (the
other principal RTL). Simulation products are distinguished principally by their
runtime -- i.e., how fast they can fully simulate a proposed design. The Company
is focused on providing the industry's fastest simulation technology and
believes that both VCS and Scirocco are industry leaders in performance and
capacity. VCS is supported by all major semiconductor manufacturers and many
third-party EDA software providers.
In addition to focusing on building the fastest simulator, Synopsys is
focused on developing a suite of products that help simulation products work
"smarter." The Company estimates that more time is spent in writing verification
testbenches than in creating the design description. Testbenches, which create
stimuli for chips and check the results, are used in conjunction with simulation
tools to verify that a design functions as expected. The Verification Technology
group provides software that helps generate and manage testbenches as well as
evaluate the effectiveness of the simulation process. VERA(R) is a tool that
automates the design of testbenches, thereby offering the IC designer
significant reductions in overall design and verification time. VERA provides a
high-level language designed specifically for verifying complex designs. VERA is
integrated with the Company's other simulation, modeling and hardware/software
co-verification products. The Company's CoverMeter product enables designers to
measure the effectiveness of their testbenches to ensure that all aspects of the
design is tested. CoverMeter is tightly integrated with VCS.
Test Automation. In order to meet today's stringent quality
requirements, chips must pass through rigorous testing after manufacturing.
Synopsys' design-for-test (DFT) tools offer a complete DFT solution. Synopsys'
DFT Compiler, the industry-standard 1-pass test synthesis product, inserts all
functional and test logic required to enable efficient, high-coverage testing of
the chip after manufacturing, while complying with the customer's design rules
and constraints (timing, area, power, etc.). DFT Compiler works seamlessly with
Design Compiler and Physical Compiler, with the added benefit, in the case of
Physical Compiler, of placement-driven optimization of test logic. In January
2001 DFT Compiler was awarded the 2001 "Best in Test" Award from Test &
Measurement World, an industry journal. The award is presented annually to honor
important and innovative new products in the electronics test and measurement
industry.
Automatic test pattern generation (ATPG) is the other component of
Synopsys' complete DFT solution. TetraMAX(TM) ATPG, the Company's ATPG product
is optimized for ease-of-use, capacity, speed, coverage and vector compaction.
TetraMAX ATPG works in concert with DFT Compiler to enable total automation of
the DFT flow. Synopsys test methodology also includes featuressoftware to facilitate the
failure diagnosis of chips after manufacturing test, expediting the
time-consuming and expensive post-fabrication activities required to determine
the cause of manufacturing defects. TetraMAX ATPG was also awarded the 2000
"Best in Test" award from Test & Measurement World.
Static Timing Analysis. Synopsys provides a complete tool suite to help
designers perform static timing analysis at the gate- and transistor levels and
analyze signal integrity issues such as advanced automatic retimingcross-talk. Synopsys' gate-level
analysis tool is called PrimeTime(R). PrimeTime is a full-chip, gate-level
static timing analysis tool targeted for complex multimillion gate designs,
which is used by designers to verify, at various stages of the design process,
the speed at which a design will operate when it is fabricated. PrimeTime's
analysis of a design's speed is accepted as a "sign off" tool by virtually all
major semiconductor manufacturers, which means that they accept its analysis as
determinative. (Synopsys transistor-level timing analysis products are described
below under "Transistor Level Design".
Formal Verification -- Equivalence Checking. Formal verification is a
method for comparing two versions of a design to determine if they are
equivalent. Usually an RTL version of the design is validated using simulation
and pipeliningother dynamic verification tools, establishing it as the golden version.
Subsequent versions (i.e., after each step of the design process) are then
compared to extendthe golden version, using mathematical algorithms, to FPGA designersdetermine if
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they are functionally equivalent. The use of formal verification greatly reduces
the unique technologiesneed to perform simulation, which is substantially more time-consuming, at
each stage of the design process, thus potentially saving a significant amount
of time in the overall design process. Synopsys' formal verification product is
Formality(R). Formality was one of the industry's first commercial equivalency
checkers to employ a multi-solver architecture, which enables the verification
of complex multimillion-gate system-on-a-chip designs in days or minutes.
Intellectual Property (IP) and experience that Synopsys developedSystems Products
The Company's IP and Systems products include our DesignWare, models,
and systems design and verification products.
During fiscal 2000, IP and Systems products accounted for ASICs.
Design Reuse Business Unit14% of the
Company's revenues.
Intellectual Property Products. As IC designs continue to grow in size,
reusing design blocks is becoming a more important method for reducing overall
design cycle time. By reusing portions of a design, and particularly those that
implement basic or standardized functions, a company can let its IC design team
focus on designing the chip features that will give its product a competitive
advantage. It can also reduce it's verification risk by ensuring that these
portions of the chip are of high quality. Enabling design
reuse of intellectual
property (IP) requires a significant methodology shift from traditional IC
design. In the past, designs were intimately tied to a particular semiconductor
process technology or design methodology, making reuse of design blocks from one
chip design to the next difficult and costly.
To address these challenges, the Design
Reuse Business Unit offers an array of products and services.
Synopsys' DesignWare(R) product provides IC designers with libraries of
pre-designed, pre-verified Synopsys-synthesizable (i.e., usable by Synopsys'
design tools in optimizing a design), off-the-shelf design modules to
incorporate into their own designs. The DesignWare foundation library includes
more than 100 commonly used functions of low-tolow- to medium-scale complexity,
including an 8051 microcontroller block and a PCI 2.1 bus interface block.
DesignWare(R)DesignWare Developer helps customers package their own low-complexity functions
in such a wayso that they are integrated into designs in the same way as DesignWare
components.
In fiscal 1999, Synopsys introduced coreBuilder(TM)The Company's IP and coreConsultant(TM),
which ease the packaging and integration of medium-to high-complexity cores.
CoreBuilder is used to package cores, and guides the capture of synthesis data,
designer knowledge, configuration parameters (along with their interactions and
limits), and implementation/verification procedures. CoreConsultant is used to
unpack the cores and uses this information to create an optimal,
technology-mapped netlist, lowering the effort of integrating the cores into
system-on-a-chip designs.
The Design Reuse Business UnitSystems products also develops and supports silicon libraries
of logic functions used in developing ICs. The libraries are optimized to the
customer's semiconductor process and Synopsys' tools. The silicon libraries
contain the models that are required by EDA design tools to design an IC.
Synopsys offers a proprietary gate array IC architecture, known as Cell-Based
Array (CBA(TM)). Synopsys has entered into CBA license agreements with many of
the world's leading ASIC vendors and vertically integrated semiconductor
companies. Synopsys has expanded its offering of silicon libraries to include
Odyssey standard cells and memories.
The Design Reuse Business Unit, together with the Synopsys Professional
Services Group (PSG), also offers consulting services around implementation of
the design principles set forth in the Reuse Methodology Manual (RMM). Jointly
authored by Synopsys and Mentor Graphics Corp., the RMM contains detailed
guidelines and best practices for planning, specifying, coding, testing and
documenting reusable design blocks.
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HIGH-LEVEL VERIFICATION GROUP
The High-Level Verification Group provides a range of products that allow
IC designers to determine, at different levels of design and at various stages
of the design process, whether an IC will perform as intended. Verification is
becoming increasingly important in the design process, because as the complexity
of chip design increases, the complexity of verification increases
exponentially. A verification bottleneck has developed, with designers of
complex chips spending half or more of their total design time performing
verification. Synopsys verification products are intended to provide an
integrated solution for customers that is accurate, exhaustive and fast.
Simulation Technology Group
In the simulation process, simulation software "exercises" an IC design by
running it through a series of tests and comparing the actual outputs from the
design with the expected output. The goal of simulation is to make sure that the
functionality and timing performance of the design meet the original
specifications of the chip. The Simulation Tools Group provides designers with
several products for high-level simulation, including VCS(TM) for designs
written in Verilog and VSS(TM) and Cyclone(R) for designs written in VHDL. The
Company is focused on providing the industry's fastest simulation technology and
believes that both VCS and Cyclone are industry leaders in the areas of
performance and capacity. VCS is supported by the all of the major semiconductor
manufacturers. VCS, VSS and Cyclone are optimized for use with Design Compiler
and the Company's other design tools.
VERA Group
The Company estimates that approximately half of the time spent in the
verification phase of IC design is spent designing testbenches, which are the
set of test vectors that are used by simulation tools in verifying that a chip
design functions properly. The VERA Group provides software that helps generate,
manage, and evaluate the data flowing between the simulator and the IC design.
VERA(TM), the principal product of the Group, automates the design of
testbenches, thereby offering the IC designer significant potential reductions
in overall verification time. VERA is integrated with the rest of Synopsys'
simulation, modeling and hardware/software co-verification products.
Large Systems Technology Group
The Large Systems Technology Group provides high-level models and
tools to facilitate the modeling and verification of complex electronic systems.
The
Group manages the Company's hardware and software modeling products as well as
its Eagle hardware/software co-design tools.
Synopsys offers a full range of hardware and software modeling solutions.
Synopsys'
ModelSource(TM) 3000 series is a family of hardware modeling systems for ASIC
and board level design which provide a flexible means for designers to model
complex devices. ModelSource 3000 systems use the actual integrated circuit to
model its own behavior.behavior in a larger system. Synopsys' SmartModels(R) Libraries
offer models for more than 13,00018,000 commercially available ICs, including a wide
range of microprocessors, controllers, DSPs,digital signal processors, FPGAs, CPLDs,
peripherals, memories and standard logic. Synopsys' bus interface models are
used to verify that designs comply with established industry standards. Models are available for most
popular standards.Starting
in fiscal 2001, these models and the SmartModels libraries will be offered
exclusively with DesignWare. In addition, Synopsys offers modeling technologies
to allow designers to create models of both standard and proprietary devices.
These models support all major EDA simulation environments and a wide range of
EDA platforms, giving designers access to a broad range of models to assist them
with verification of their designs.
SuccessSystems Design and Verification Products. Currently, automated design
generally begins at the RTL level, with logic synthesis. The goal of
"system-level" products is to permit designers to design and verify their
products at a level of abstraction above RTL. Synopsys' systems products
consist of the CoCentric(TM) family of tools and methodologies for concurrent
design, validation, refinement and implementation of an electronic system.
The CoCentric family of products are based on a new language named
"SystemC" developed by Synopsys and now available under an open source license.
SystemC enables designers to create, validate and share system level models of a
complex IC or system incorporating the chip, and therefore can be used to
explore and verify design alternatives at an early stage of the design process.
In addition, EDA vendors have complete access to the SystemC modeling platform
required to build interoperable tools. SystemC is managed by the Open SystemC
Initiative, which includes representation from the systems, semiconductor, IP,
embedded software and EDA industries. The steering group is composed of ARM,
Cadence Design Systems, CoWare, Ericsson, Fujitsu Microelectronics, Infineon
Technologies, Lucent Technologies, Motorola, NEC, Sony, STMicroelectronics,
Texas Instruments and Synopsys.
The Company has introduced two products based on SystemC. CoCentric
System Studio is a system-level design environment for the rapid creation of
executable system specifications that can be verified and implemented as
hardware and software functions. System Studio enables designers to use
hierarchical graphical and language modeling to capture system complexity in a
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unified environment based on C, C++ and SystemC. System Studio supports
verification of hardware and software design refinements through concurrent
execution of C-based specifications, popular hardware simulators, and a variety
of processor models. In fiscal year 2000, Synopsys started to migrate customers
of its COSSAP(R) design system to CoCentric System Studio.
CoCentric SystemC Compiler is a synthesis tool that allows designers to
implement complex circuits from SystemC, enabling design to progress from an
initial C/C++ executable specification. Starting from a higher level of
abstraction than Design Compiler and eliminating the need to remodel in Verilog
or VHDL, SystemC Compiler accelerates the design cycle. SystemC Compiler allows
designers to rapidly create alternative implementations of a design, enabling
them to spend time productively evaluating tradeoffs in performance, size and
power consumption before committing to a particular implementation. CoCentric
SystemC is undergoing evaluation by a number of customers.
In fiscal 2000, the Company's IP and Systems products included silicon
libraries of logic functions used in developing ICs. On December 4, 2000, the
Company entered into an agreement to sell this business to Artisan Components,
Inc. The transaction closed in January 2001.
Transistor Level Design Products
Synopsys' transistor level design products include a range of products
in the modeling business depends,areas of timing analysis and verification; power management; circuit
simulation and IP verification. These products, which are used after the
completion of physical design, help customers analyze the increasingly important
electrical effects resulting from designing at 0.18 micron and below, and to
locate implementation errors that can be costly and time-consuming to correct
during or after production. As the logic and physical design phases of IC
Implementation grow more and more integrated, the Company is also integrating
many of its transistor level design products with its high level verification
products, particularly in the areas of timing and power analysis.
During fiscal 2000, Transistor Level Design products accounted for 7% of
the Company's revenues.
Static Timing Analysis and Signal Integrity. As part upon making availableof it's overall
approach to timing and signal integrity analysis and verification, Synopsys'
offers PathMill(R), PathMillPlus and AMPS(R). These tools are integrated with
Arcadia, the Company's resistance and capacitance (RC) extraction tool. The
tools enable quick identification and debugging of complex timing problems
taking into account signal integrity (not yet released) effects for ICs designed
at 0.18 micron and below. PathMill is a wide rangetransistor-level static timing analysis
tool for designers of modelslarge, complex and model types.high performance microprocessor and
DSPs. PathMillPlus is the next generation IP characterization product that
incorporates the capabilities of PathMill and delivers a comprehensive solution
for IP characterization and re-use.
Circuit Simulation. TimeMill(R) and PowerMill(R) provide high accuracy,
high speed, and high capacity circuit simulation technology. These tools are
vital in the diagnosis of design flaws in transistor-level blocks, including the
critical memories, datapaths, and analog/mixed-signal blocks, and assist
designers with the overall optimization of circuit speed and power dissipation.
Power Management. Synopsys continuesdelivers a complete solution to focus its modeling
development efforts on enhancing its abilityhelp
designers manage and verify power consumption at different levels of the design
process. The products in the solution include: Power Compiler (described under
IC Implementation category), PrimePower, PowerArc, PowerMill and RailMill.
PrimePower, introduced in fiscal 2000, is a dynamic, full-chip comprehensive
power analysis tool for complex multimillion-gate ASICs. PrimePower allows users
to quickly and efficiently produceverify that their IC designs meet power budgets and
distribute new models to meet rising verification needs. Synopsys seeks to
maintain close relationships with leading semiconductorspecifications, select the proper packaging, determine cooling requirements and
estimate the battery life for portable applications. As a foundation for
Synopsys' power solution, PowerArc delivers automatic cell library power
characterization, making it easy for library providers and ASIC and silicon
vendors to ensure model
accuracyautomatically produce power libraries with SPICE-level accuracy.
Synopsys Professional Services Business Unit
Synopsys Professional Services provides a comprehensive portfolio of
consulting services covering all critical phases of the system-on-a-chip
development process, as well as systems development in wireless and broadband
applications. Customers are offered a variety of engagement models ranging from
project assistance - which helps a customer design, verify and/or test its chips
and improve its design process -- to full turn-key development.
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During fiscal 2000, the Synopsys Professional Services business unit
accounted for 10% of the Company's revenues.
Internet Design Services Business Unit
Through its DesignSphere(SM) Access program, the Internet Design
Services group provides a complete design environment for complex IC development
accessible over the internet. This service enables customers to use software of
the Company and others remotely without incurring the time and costs of
installing, owning and maintaining the software and associated hardware. The
software is available on custom-configured, dedicated, high-performance computer
hardware, protected by physical and software security measures including
firewalls, bi-directional data encryption and custom access protocols. Security
is audited by third-party experts, and the earliest possible availability.Company provides backup and disaster
recovery services.
ORGANIZATION
Synopsys believes that future
design verification methodologies, including those for system-on-a-chip, will
requireis currently organized into four product development groups --
Physical Synthesis, Verification Technology, Intellectual Property and Systems,
and Nanometer Analysis and Test -- and a services group -- Synopsys Professional
Services. The Physical Synthesis business unit principally develops and manages
our IC Implementation products. The Verification Technology business unit
develops and manages the availability of accurate, high performance models of complex
componentssimulation products in our Verification and intellectual property blocks.
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Synopsys' Eagle Design Automation tools help shorten the development time
of embedded systems through hardware/software (HW/SW) co-development.Test
product portfolio. The term
"embedded systems" describes ICs or PCBs that include a microprocessor or
microcontroller. The use of embedded systems is growing, in part due to the
growth of system-on-a-chip designs, which include logic, memoryIntellectual Property and at least one
processor on the same chip. An important decision in embedded system design is
the allocation of functions between hardwareSystems business unit develops
and software. An estimated 50%manages all of the overall embedded systems design time is spent in HW/SW design and debug, and
prototype debug. As a result, hardware and software development for embedded
systems are becoming more interdependent, and given the costs of design cycle
iterations, there are advantages to consider hardware and software interaction
earlierproduct in the design cycle. By helping IC designers consider this interaction
earlyIP and Systems product category. The
Nanometer Analysis and Test business unit develops and manages the timing
analysis, power and test products in the design cycle, the Synopsys' Eaglei(R)(TM)Verification and Test product which is used
for full system integration testing,category,
and the products in the Transistor Level Design category.
During fiscal year 2000 Synopsys EagleV(TM) product, which
is usedestablished a business unit -- the
Internet Design Services Business Unit -- to develop an "application service
provider" or "hosted design environment" business for verification of embedded processors within an ASIC, can help reduce
the overall cost of embedded system designs.
PROFESSIONAL SERVICES GROUP
The Professional Services Group (PSG) provides a combination of flow and
methodology services, design assistance and design services aimed at solving our
customers' toughest design problems.
Our consultants offer targeted expertise to help define and implement
optimized design environments and to support engineering teams with complete
system-on-a-chip flows. Design assistance services accelerate the adoption and
acceptance of new tools and methodologies enabling customers to acquire the
knowledge and experience to tackle future challenges with increased confidence.
As needed, Synopsys consultants will also take on the responsibility for
designing and verifying parts or all aspects of a customer's design.Company's software
products.
CUSTOMER SERVICE AND SUPPORT
Synopsys devotes substantial resources to providing customers with
technical support, customer education, and consulting services. The Company
believes that a high level of customer service and support is critical to the
adoption and successful utilization of high-level design automation methodology.
As a result of increased product sales during fiscal 1999,In Fiscal 2000, service revenue as a percentage of total revenue decreasedincreased to
44% as compared to 37% in such period from 40% in fiscal 1998.1999.
TECHNICAL SUPPORT
Technical support for the Company's products is provided through both
field- and corporate-based technical application engineering groups. Synopsys
provides customers with software updates and a formal problem identification and
resolution process through the Synopsys Technical Support Center. Synopsys'
central entry point offor all customer inquiries is SolvNET(R), a direct-access
service available worldwide, 24 hours per day, through electronic mail and the
World Wide Web that lets customers quickly seek answers to design questions or
more insight into design problems. SolvNET combines Synopsys' complete design
knowledge database with sophisticated information retrieval technology. Updated
daily, it includes documentation, design tips, and answers to user questions.
CUSTOMER EDUCATION SERVICES
Synopsys offers a number of workshops focused on many aspects of high-level design
languages, high-level design, simulation, synthesis, physical design, system
design and test. Regularly scheduled workshops are offered in Mountain View,
California; Austin, Texas; Burlington, Massachusetts; Reading, England; Rungis,
France; Munich, Germany; Tokyo and Osaka, Japan; Seoul, Korea and Seoul, Korea.other
locations. On-site workshops are available on a worldwide basis at customers'
facilities or in their locales. Over 14,00015,000 design engineers attended Synopsys
workshops during fiscal 1999.2000.
PRODUCT WARRANTIES
Synopsys generally warrants its products to be free from defects in
media and to substantially conform to material specifications for a period of 90
days. Synopsys has not experienced significant returns to date.
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SUPPORT FOR INDUSTRY STANDARDS
Synopsys actively supports standards that it believes will help its
customers increase productivity and solve design problems, including key
interfaces and modeling languages that promote system-on-a-chip design and
facilitate interoperability of tools from different vendors. Standards in the
EDA industry can be obtained through formal accredited committees, by licensing
made available to all, or through community licensing.
Synopsys' products support many formal standards, including the two most
commonly used hardware description languages, VHDL and Verilog HDL, and industry
standard data formats for the exchange of data between Synopsys' tools and other
EDA products.
Synopsys is a board member and/or participant in the major EDA standards
organizations: Virtual Socket Interface Alliance (VSIA), an industry group
formed to promote standards that facilitate the integration and reuse of
functional blocks of intellectual property; Accellera, a not-for-profit
consortium formed from the union of VHDL International and Open Verilog
International (OVI),
which promotes the Verilog language; VHDL International (VI), which promotes the
VHDL language;to drive language-based standards for systems, semiconductor, and
design tools companies; the EDIF steering committee of the Electronics Industry
Association (EIA), which evolves the Electronic Design Interchange Format
(EDIF); and the interoperability committee of the EDA Consortium, which helps
promotespromote interoperability among EDA products from different vendors; Virtual
Component Exchange (VCX), which is investigating methods for facilitating the
exchange of intellectual property (IP) blocks; and Reusable Application-specific
Intellectual Property Developers (RAPID), which promotes the acceptance and
usage of IP throughout the electronics industry.
To enhance EDA industry interoperability, Synopsys launched thevendors.
Synopsys' TAP-In program in 1998 to provideprovides open access for all companies to
selected interfaces for Synopsys tools. Synopsys has licensed its text-based
synthesis library format, Liberty, as well as its design constraints format,
SDC, to the majority of the EDA industry, including the Company's competitors,
on reasonable terms. In 1999, Synopsys has licensed to certain EDA companies its VERA API
(application programming interface) and VERA HVL (High-level Verification
Language) for test bench verification. Also,
Synopsys licensedverification and its OpenESPF format for representing
physical data necessary for reliability verification.
In 1999, Synopsys introduced SystemC, through its TAP-in program. SystemCan open industry standard language for the exchange of
intellectual property and executable specifications, is discussed above under
"Design Tools Group -- System Level Design"IP and Systems Business Unit."
Synopsys' products are written mainly in the C and C++ languages and
utilize industry standards for graphical user interfaces. Synopsys' software
runs principally under the UNIX operating system, with some products running
under Windows NT and many on Linux. Synopsys' products are offered on the most
widely used workstation platforms, including those from Sun Microsystems,
Hewlett-Packard, IBM, and Compaq (formerly Digital Equipment Corporation).
SALES, DISTRIBUTION AND BACKLOG
Synopsys markets its products and services primarily through its direct
sales and service force in over 30 offices in the United States and principal
international markets. Synopsys employs highly skilled engineers and technically
proficient sales persons, capableas required to understand our customers needs and to
explain and demonstrate the value of serving the sophisticated needs of the
customers' engineering and management staffs.Synopsys' products.
For fiscal years 2000, 1999 1998 and 1997,1998, international sales represented
34%42%, 39%34% and 41%39%, respectively, of Synopsys' total revenue. For the one-month
period ended October 31, 1999, international sales represented 36% of the
Company's total revenue. Additional information relating to domestic and foreign
operations is contained in Note 78 of Notes to Synopsys' Consolidated Financial
Statements.
The Company has 23 sales/support centers throughout the United States,
in addition to its Mountain View, California headquarters. Internationally, the
Company has sales/support offices in Canada, Denmark, Finland, France, Germany,
Hong Kong, India, Israel, Italy, Japan, Korea, the People's Republic of China,
Singapore, Sweden, Taiwan and the United Kingdom, including regionalinternational
headquarters offices in Germany, Japan, Singapore and Ireland. On a limited basis, the Company also utilizes
manufacturer's representatives and distributors. The Company has established
such relationships in Australia, Brazil, China, India, Korea, Malaysia, Taiwan and
China.
12
13Taiwan.
Synopsys' backlog on December 1, 19992000 was approximately $276.0$462.8 million,
compared to approximately $241.1$276.0 million on NovemberDecember 1, 1998.1999.
Backlog consists of orders for system and software products sold under
perpetual and time-based licenses with customer requested ship dates within
three months but which have not been shipped, orders for customer training and
consulting services which are expected to be completed within one year, and
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12
subscription services, maintenance and support with contract periods extending
up to fifteen months. In the case of a Technology Subscription License (TSL),
including a multiyear TSL, backlog includes the full amount of the order, less
any amount of revenue that has been recognized on such TSL.
The Company has not historically experienced significant cancellations
of orders. Customers frequently reschedule or revise the requested ship dates of
orders however, which can have the effect of deferring recognition of revenue
for these orders beyond the expected time period.
RESEARCH AND DEVELOPMENT
The Company believes that itsCompany's future performance will dependdepends in large part on its ability to
maintain and enhance its current product lines, develop new products, maintain
technological competitiveness, and meet an expanding range of customer
requirements. In addition to productresearch and development teams,conducted within each
business unit, the Company maintains an advanced research group that is
responsible for exploring new directions and applications of its core
technologies, migrating new technologies into the existing product lines, and
maintaining strong research relationships outside the Company within both
industry and academia.
During fiscal years 2000, 1999 1998 and 1997,1998, research and development
expenses, net of capitalized software development costs, were $189.3 million,
$167.1 million and $156.7 million, respectively. For the one-month period ended
October 31, 1999, research and $146.8 million, respectively.development expenses were $17.2 million. Synopsys
capitalized software development costs of approximately $1.0 million, $1.0
million and $2.1 million and $4.2 in fiscal 2000, 1999 and 1998, and 1997, respectively. For the
one-month period ended October 31, 1999, capitalized software development costs
were not material. The Company anticipates that it will continue to commit
substantial resources to research and development in the future.
MANUFACTURING
Synopsys' manufacturing operations consist of assembling, testing,
packaging and shipping its system and software products and documentation needed
to fulfill each order. Manufacturing is currently performed in Synopsys'
Mountain View, California, and Beaverton, Oregon and Dublin, Ireland facilities.
Outside vendors provide tape and CD-ROM duplication, printing of documentation
and manufacturing of packaging materials. Synopsys employees manufacture and
test the hardware modeling system products, with some sub-assembly performed by
outside vendors. Synopsys typically ships its software products with either a permanent or
temporary access key, within 10 days
of acceptance of customer purchase orders and execution of software license
agreements, unless the customer has requested otherwise. On customer request,
Synopsys delivers its software products through electronic means rather than
shipping disks. This method of delivery is becoming increasingly common for
domestic customers. For its hardware modeling products, Synopsys buys components
and assemblies in anticipation of orders and configures units to match orders,
typically shipping within one to ten weeks of order acceptance, unless the
customer has requested otherwise.
COMPETITION
The EDA industry is highly competitive. We compete against other EDA
vendors, and with customers' internally developed design tools and internal
design capabilities, for a share of the overall EDA budgets of our potential
customers. In general, competition is based on product quality and features,
post-sale support, price and, as discussed below, the ability to offer a
complete design flow. Our competitors include companies that offer a broad range
of products and services, such as Cadence, Design Systems, Inc. (Cadence), Mentor Graphics and Avant! Corporation (Avant!), as well
as companies, including numerous start-up companies, that offer products focused
on a discrete phase of the integrated circuit design process. In certain
situations, Synopsys' competitors continue to offerhave been offering aggressive discounts on
certain of their products, in particular onsimulation and synthesis and Verilog
simulation products. If this behavior continues,As a
result, average prices for ourthese products may fall. In order to compete
successfully, we must continue to enhance our products and bring to market new
products that address the needs of our customers. We also will have to expand
our consulting services business. The failure to enhance existing products,
develop and/or acquire new products or expand our ability to offer consulting
services could have a material adverse effect on our business, financial
condition and results of operations.
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14
Technology advances and customer requirements are fuelingcontinue to fuel a change
in the nature of competition among EDA vendors. Increasingly, EDA companies
compete on the basis of "design flows" involving integrated logic and physical
design toolsproducts (referred to as "physical synthesis" products) rather than on
the basis of individual "point" tools performing a discrete phase of the design
process. The need to offer products linking logic and physical designsynthesis products will become increasingly
important as IC complexity is increasing, chip
production moves increasingly to 0.18 micronICs grow more complex. Our main physical synthesis product was
fully released in June 2000, and below, and system-on-a-chip
designs become more prevalent. Wehas been well-received by customers, but we
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13
still do not offer customers a wide range of logiccomplete design tools but
have only recently introduced our first physical design tools.flow. We are working on
completing our design flow, although for the foreseeable futurethere is no guarantee that we will not be able
to offer such a competitive flow to customers. The market for physical design tools
is dominated by Cadence and Avant! Both companies have acquired logic synthesis
technology and are offering, both of which offer products linking synthesis to theirlogic
and physical design
products.design. If we are unsuccessful in developing a complete design flow
on a timely basis or in convincing customers to adopt our integrated logical and
physical design products and methodology, our competitive position could be
significantly weakened.
PRODUCT SALES AND LICENSING AGREEMENTS
Synopsys typically licenses its software to customers under
non-exclusive license agreements that transfer title to the media only and that
restrict use of the software to internalspecified purposes within specified geographical
areas. The Company currently licenses the majority of its software as a network
license that allows a number of individual users to access the software on a
defined network. During
fiscal 1999, Synopsys offered software under a perpetual license or a license
with a term of one to three years. In the fourth quarter of fiscal 1999,
Synopsys announced a new program, under which software will be offered either
under a perpetual license or under term licenses of one, three or five years.
License fees are dependent on the type of license, product mix
and number of copies of each product required.
Synopsys currently offers its software products under either a perpetual
license or a shorter-term subscription license. Under a perpetual license a
customer pays a one time license fee for the right to use the software. The vast
majority of customers also purchase annual software support services, under
which they receive minor enhancements to the products developed during the year,
bug fixes and technical assistance. A subscription license, and the various
forms of time-based licenses that the Company has offered before introducing
subscription licenses, operates like a rental of software. A customer pays a fee
for license and support over a fixed period of time, and at the end of the time
period the license expires unless the customer pays for a renewal. Subscription
licenses are offered with a range of terms; the average length is approximately
three years. See "Management's Discussion and Analysis of Financial Condition
and Results of Operations --Results of Operations-Revenue."
Over the past several years, orders for time-based licenses (now
subscription licenses) have increased significantly as a percentage of total
product orders. During fiscal year 2000, orders for time-based licenses
accounted for 74% of total product orders compared to 64% in fiscal 1999 and
111% in fiscal 1998.
During fiscal year 2001 Synopsys expects that orders for subscription
licenses will account for approximately 75% of total product orders and orders
for perpetual licenses approximately 25% of total product orders, although there
are likely to be variations of plus or minus five percentage points in any
particular quarter.
Synopsys offers its hardware modeler products for sale or lease.
PROPRIETARY RIGHTS
The Company primarily relies upon a combination of copyright, patent,
trademark and trade secret laws and license and nondisclosure agreements to
establish and protect proprietary rights in its products. The source code for
Synopsys' products is protected both as a trade secret and as an unpublished
copyrighted work. However, it may be possible for third parties to develop
similar technology independently, provided they have not violated any
contractual agreements or intellectual property laws.independently. In addition, effective copyright and trade
secret protection may be unavailable or limited in certain foreign countries.
The Company currently holds U.S. and foreign patents on some of the technologies
included in its products and will continue to pursue additional patents in the
future.
Although the Company believes that its products, trademarks and other
proprietary rights do not infringe on the proprietary rights of third parties,
there can be no assurance that infringement claims will not be asserted against
the Company in the future or that any such claims will not require the Company
to enter into royalty arrangements or result in costly and time-consuming
litigation.
EMPLOYEES
As of September 30, 1999,October 31, 2000, Synopsys had a total of 3,1562,922 employees, of whom
2,4212,098 were based in the United States and 735824 were based internationally.
Synopsys' future financial results depend, in part, upon the continued service
of its key technical and senior management personnel and its continuing ability
to attract and retain highly qualified technical and managerial personnel.
Competition for such personnel is intense. Experience at Synopsys is highly
valued in the EDA industry, and the Company's employees are recruited
aggressively by competitors and by start-up companies, including those in
internet-related businesses. The Company's salaries are competitive in the
market, but under certain circumstances, start-up companies can offer more
attractive stock option packages. As a result, the Company has experienced, and
may continue to experience, significant employee turnover. There can be no
assurance that Synopsys can retain its key managerial and technical employees or
13
14
that it can attract, assimilate or retain other highly qualified technical and
managerial personnel in the future. None of Synopsys' employees is represented
by a labor union. Synopsys has not experienced any work stoppages and considers
its relations with its employees to be good.
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15
ITEM 2. PROPERTIES
Synopsys' principal offices are located in four adjacent buildings in
Mountain View, California, which together provide approximately 400,000 square
feet of available space. This space is leased through February 2003. Within one
half mile of these buildings, in Sunnyvale, California, Synopsys occupies
approximately 200,000 square feet of space in two adjacent buildings, which isare
under lease through 2007, and approximately 85,000 square feet of space in a
third building, which is under lease until April 2007.
To help meet its future expansion needs, Synopsys has acquired seven acres
between its Sunnyvale and Mountain View campuses, thirty-four acres of
undeveloped land in San Jose, California and forty-four acres of undeveloped
land in Hillsborough, Oregon. The Company currently plans to developleases approximately 14,000 square feet in Dublin,
Ireland, for its international headquarters and for research and development
purposes. This lease expires in May 2001, at which time the Company will execute
a building
on the seven-acre site,25-year lease for occupancy45,000 square feet in February 2001.a new facility in Dublin.
The Company leases approximately 93,000 square feet of space in
Beaverton, Oregon for administrative, marketing, research and development and
support activities. This facility is leased through March 2002.2002, and will be
replaced by the newly constructed site in Hillsborough, Oregon.
In addition, the Company leases approximately 82,000 square feet of
space in Marlboro, Massachusetts for sales and support, research and development
and customer education activities. This facility is leased through March 2009.
The Company currently leases 23 other domestic sales offices throughout
the United States, as well as three remote locations. Synopsys currently leases
international sales and service offices in Canada, Finland, France, Germany,
Hong Kong, India, Israel, Italy, Japan, Korea, the People's Republic of China,
Singapore, Sweden, Taiwan, and the United Kingdom. The Company also leases
an
administrative and research and development facilities in France, Germany and India.
Synopsys owns a fourth building in Sunnyvale, with approximately 120,000
square feet, which is leased to a third party through May 2003. Synopsys also
owns thirty-four acres of undeveloped land in San Jose, California and 13 acres
of undeveloped land in Marlboro, Massachusetts. Additionally, Synopsys owns
forty-four acres of land in Hillsborough, Oregon on which two buildings,
totaling 236,000 square feet, are being constructed, with completion scheduled
for December 2001. This facility will replace the currently leased site in
Ireland and a research
and development facility in India.Beaverton.
ITEM 3. LEGAL PROCEEDINGS
There are no material legal proceedings pending against the Company.
ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS
No matters were submitted for a vote of security holders during the
fourth quarter of the fiscal year covered by this Report.
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15
EXECUTIVE OFFICERS OF THE COMPANY
The executive officers of the Company and their ages, as of December 1,
1999,2000, are as follows:
NAME AGE POSITIONName Age Position
- ---- --- --------
Aart J. de Geus...................... 45Geus 46 Chief Executive Officer and Chairman of the Board of Directors
Chi-Foon Chan........................ 50Chan 51 President, Chief Operating Officer and Director
Vicki L. Andrews..................... 44Andrews 45 Senior Vice President, Worldwide Sales
David P. Burow....................... 47 Senior Vice President, High Level Verification Group
Raul Camposano....................... 44 Senior Vice President, Design Tools Group and Chief
Technical Officer
Deirdre Hanford...................... 37 Senior Vice President, Business & Market Development
Ernst W. Hirt........................ 59 Senior Vice President, Human Resources and Facilities
Edward C. Ross....................... 57 Senior Vice President, Professional Services Group
Steven K. Shevick.................... 43 Vice President, Investor Relations and Legal and
Corporate Secretary
David Sugishita...................... 51Robert B. Henske 39 Senior Vice President, Finance and Operations, Chief Financial Officer
and Treasurer
Jack J. Warecki...................... 48 SeniorSteven K. Shevick 44 Vice President, Worldwide Application ServicesInvestor Relations and Legal, General Counsel
and Corporate Secretary
Dr. Aart J. de Geus co-founded Synopsys and currently serves as Chief
Executive Officer and Chairman of the Board of Directors. Since the inception of
Synopsys in December 1986 he has held a variety of positions
15
16 including Senior
Vice President of Engineering and Senior Vice President of Marketing. From 1986
to 1992 Dr. de Geus served as Chairman of the Board. He served as President from
1992 to 1998. Dr. de Geus has served as Chief Executive Officer since January
1994 and has held the additional title of Chairman of the Board since February
1998. He has served as a Director since 1986. From 1982 to 1986, Dr. de Geus was
employed by General Electric Corporation, where he was the Manager of the
Advanced Computer-Aided Engineering Group. Dr. de Geus holds an M.S.E.E. from
the Swiss Federal Institute of Technology in Lausanne, Switzerland and a Ph.D.
in electrical engineering from Southern Methodist University.
Dr. Chi-Foon Chan joined Synopsys as Vice President of Application
Engineering & Services in May 1990. Since April 1997 he has served as Chief
Operating Officer and since February 1998 he has held the additional title of
President. Dr. Chan also became a Director of the Company in February 1998. From
September 1996 to February 1998 he served as Executive Vice President, Office of
the President. From February 1994 until April 1997 he served as Senior Vice
President, Design Tools Group and from October 1996 until April 1997 as Acting
Senior Vice President, Design Reuse Group. Additionally, he has held the titles
of Vice President, Engineering and General Manager, DesignWare Operations and
Sr. Vice President, Worldwide Field Organization. From March 1987 to May 1990,
Dr. Chan was employed by NEC Electronics, where his last position was General
Manager, Microprocessor Division. From 1977 to 1987, Dr. Chan held a number of
senior engineering positions at Intel Corporation. Dr. Chan holds an M.S. and
Ph.D. in computer engineering from Case Western Reserve University.
Vicki L. Andrews joined Synopsys in May 1993 and currently serves as
Senior Vice President, Worldwide Sales. Before holding that position, she served
in a number of senior sales roles at Synopsys, including Vice President, Global
and Strategic Sales, Vice President, North America Sales and Director, Western
United States Sales. She has more than 18 years of experience in the EDA
industry. Ms. Andrews holds a B.S. in biology and chemistry from the University
of Miami.
David P. BurowRobert B. "Brad" Henske joined Synopsys in connection with the Company's merger with
Viewlogic Systems, Inc. (Viewlogic) in December 1997May 2000 and currently serves
as Senior Vice President High Level Verification Group. He served as Sr. Vice
President, Simulation Tools Group from December 1997 to August 1998.and Chief Financial Officer. Mr. Burow
had served as Vice President of Viewlogic's ASIC Group since October 1996. He
joined Viewlogic in August 1995 as Vice President of the High Level Design Group
after serving in a number of key management positions from October 1991 through
August 1995 at Silicon Architects, which was acquired by Synopsys in May 1995.
Preceding Silicon Architects, Mr. Burow held other management positions within
the EDA and semiconductor industries, including President of CrossCheck, a test
company; General Manager of the Analog division at Dazix; and President of
Simucad, Inc., a simulation company. Mr. Burow holds a B.S. in engineering from
Purdue University and an M.B.A. from the University of Chicago.
Dr. Raul CamposanoHenske joined Synopsys
in January 1994 and currently serves as
Senior Vice President, General Manager of the Design Toolsfrom Oak Hill Capital Management, a Robert M. Bass Group and Chief
Technical Officer. Fromprivate equity
investment firm where he was a partner from January 1997 to December 1997 he served as SeniorApril 2000.
Additionally, Mr. Henske was Executive Vice President and General Manager, Design Tools Group. From May 1996 until January
1997 he served as Vice President, Engineering, Design Tools Group. FromChief Financial
Officer, and a member of the board of directors of American Savings Bank, F.A.,
a Bass portfolio company from January 1996 until May 1996 he served as General Manager and Senior Director, Design
Planning Group, and from January 1994 until January 1996 as Director of
Engineering, Design Environment Group.to December 1996. Prior to joining Synopsys, Dr. Camposano
concurrently served asthat, he
was a business strategy and financial consultant for Bain & Company from
September 1988 to December 1995, where he last held the Design Technology Director for the German National
Research Center for Computer Scienceposition of Vice
President. Mr. Henske received an MBA in finance and as Professor of Computer Science at thestrategic management from
The Wharton School, University of Paderborn, Germany. Between 1986Pennsylvania. He serves or has served on the
board of directors for several companies, including Grove Worldwide, L.L.C.,
Williams Scotsman, Inc., Reliant Building Products, Inc. and 1991, Dr. Camposano led the
project on high-level synthesis at the IBM T.J. Watson Research Center. Active
in the EDA professional community, he also serves on various technical program
committees and editorial boards worldwide and has published over 70 articles and
three books on electronic design automation. Dr. Camposano holds a B.S.E.E. from
the University of Chile, and a Ph.D. in computer science from the University of
Karlsruhe.
Deirdre Hanford joined Synopsys in 1987 and currently serves as Senior Vice
President, Business and Market Development. During her 12 years with Synopsys,
Ms. Hanford has held a variety of senior technical and management positions,
including Vice President of Professional Services Sales Development, Vice
President of Applications Engineering, Design Tools Group, Director of Strategic
Relationships and Director
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17
of Corporate Applications Engineering. She holds a B.S.E.E. from Brown
University and an M.S.E.E. from U.C. Berkeley.
Ernst W. Hirt joined Synopsys in November 1997 and serves as Senior Vice
President, Human Resources and Facilities. Mr. Hirt was Vice President of Human
Resources at VLSI Technology, Inc. from March 1984 until he joined Synopsys. He
has also worked in high level Human Resources positions at Intel, Siemens,
Honeywell and General Electric. Mr. Hirt holds a Masters Degree in Economics
from the University of Cincinnati.
Dr. Edward C. Ross joined Synopsys in July 1998 as Senior Vice President
and General Manager of the Professional Services Group. Prior to joining
Synopsys, Dr. Ross served as President of Technology and Manufacturing at Cirrus
Logic since 1995, and President and Chief Executive Officer of Power
Integrations, Inc. from 1989 to 1995. Dr. Ross holds a B.S. in electrical
engineering from Drexel University and an M.S., M.A., and Ph.D., also in
electrical engineering, from Princeton University.American Savings
Bank, F.A.
Steven K. Shevick joined Synopsys in July 1995 and currently serves as
Vice President, LegalInvestor Relations and Investor Relations,Legal, General Counsel and Corporate
Secretary. From July 1995 to March 1998 he served as Deputy General Counsel and
Assistant Corporate Secretary. In March 1998 he was appointed Vice President,
Legal and General Counsel. In October 1999, Mr. Shevick gained the additional
title of Vice President of Investor Relations and was appointed Corporate
Secretary. Prior to joining Synopsys, Mr. Shevick was a lawyer in the New York,
Hong Kong and Washington, D.C. offices of Cleary, Gottlieb, Steen & Hamilton,
where his practice focused on international securities transactions, mergers and
acquisitions and technology licensing. Mr. Shevick hasholds an A.B. from Harvard
College and a J.D. from Georgetown University Law Center.
David Sugishita joined Synopsys in June 1997 and currently serves as Senior
Vice President, Finance and Operations and Chief Financial Officer. From 1995 to
1997 he served as Senior Vice President of Finance and Administration and Chief
Financial Officer for Actel, and from 1994 to 1995 Mr. Sugishita was Senior Vice
President of Finance and Administration, Chief Financial Officer and Treasurer
for Micro Component Technology. From 1991 to 1994, he was Vice President and
Corporate Controller and Chief Accounting Officer for Applied Materials. From
1982 to 1991 he served as Vice President of Finance, Semiconductor Group for
National Semiconductor. He holds a B.S. in finance from San Jose State
University and an M.B.A. from Santa Clara University. Mr. Sugishita currently
serves as a Director for Micro Component Technology, as well as being active in
the community by serving on two school boards.
Jack J. Warecki joined Synopsys in December 1993 and currently serves as
Senior Vice President of Worldwide Application Services. Prior to that, he held
various management positions at Synopsys overseeing Application Services for
North America. Before joining Synopsys, he spent thirteen years in a number of
technical and project lead roles at TRW, Inc., an automotive, space, defense and
information systems company. Mr. Warecki holds a B.S. and M.S. in mathematics
from the Ohio State University. He also serves on the Electrical Engineering
Advisory Board for San Jose State University.
There are no family relationships among any executive officers of the
Company.
1715
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PART II
ITEM 5. MARKET FOR REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS
The information required by this item is set forth on page 5250 of the
Synopsys 19992000 Annual Report on Form 10-K.
ITEM 6. SELECTED FINANCIAL DATA
FINANCIAL SUMMARY
AS OF OR FOR THE YEAR ENDED SEPTEMBERFiscal Year One Month
Ended Ended Fiscal Year Ended September 30,(1) ----------------------------------------------------------(2)
October 31, October 31, --------------------------------------------------------
(In thousands, except per share data) 2000(2) 1999(2) 1999 1998 1997 1996
1995
---------- -------- -------- -------- --------- ------------------------------------- ----------- ----------- ----------- ----------- ----------- -----------
(in thousands, except per share
data)
Revenue............................
Revenue $ 783,778 $ 23,182 $ 806,098 $717,940 $646,956 $525,599 $410,644$ 717,940 $ 646,956 $ 525,599
Income (loss) before income taxes and
extraordinary items(2)...........items (3) 145,938 (25,480) 251,411 116,861 132,793 40,228
59,126Provision (benefit) for income taxes 48,160 (9,937) 90,049 55,819 51,043 23,426
Extraordinary items,
net of income tax expense......................expense -- -- -- 28,404 -- --
--
Provision forNet income taxes......... 90,049 55,819 51,043 23,426 22,771
Net income.........................(loss) 97,778 (15,543) 161,362 89,446 81,750 16,802
36,355
Earnings (loss) per share
Basic............................Basic 1.43 (0.22) 2.30 1.34 1.30 0.28
0.64
Diluted..........................Diluted 1.38 (0.22) 2.20 1.29 1.24 0.27
0.59
Working capital....................capital 331,857 621,918 627,207 504,759 336,675 238,942
221,425
Total assets.......................assets 1,050,993 1,178,283 1,173,918 951,633 769,499 584,853
446,443
Long-term debt.....................debt 564 11,304 11,642 13,138 9,191 15,974
63
Stockholders' equity...............equity 682,829 872,597 865,596 664,941 502,445 350,547 287,362
- ---------------
(1) Amounts and per share data for periods presented have been retroactively
restated to reflect the merger of Everest Design Automation, Inc. (Everest) in
a pooling-of-interests transaction effective November 21, 1998.
(2) The Company has a fiscal year that ends on the Saturday nearest October
31. Fiscal 2000, 1999, 1997 and 1996 were 52-week years while fiscal
1998 was a 53-week year. Fiscal year 2001 will be a 53-week year. For
presentation purposes, the consolidated financial statements and notes
refer to the calendar month end. Prior to fiscal 2000, the Company's
fiscal year ended on the Saturday nearest to September 30. The period
from October 3, 1999 through October 30, 1999 was a transition period.
Information for the transition period was filed with Synopsys' quarterly
report on Form 10-Q for the first quarter of fiscal 2000 and is included
in this annual report.
(3) Includes charges of $1.7 million, $21.2 million, $33.1 million, $5.5
million, $64.5 million, $12.5 million for the years ended October 31, 2000 and
September 30, 1999, 1998, 1997, 1996 and 1995,1996, respectively, for in-process
research and development. Includes merger-related and other costs of
$51.0 million and $11.4 million for the years ended September 30, 1998
and 1997, respectively.
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1917
ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS
OF OPERATIONS
The following discussion contains forward-looking statements within the
meaning of Section 21E of the Securities Exchange Act of 1934. For example,
statements including terms such as "projects," "expects," "believes,"
"anticipates" or "targets" are forward-looking statements. Actual results could
differ materially from those anticipated in such forward-looking statements as a
result of certain factors, including those set forth under "Factors That May
Affect Future Results."
RESULTS OF OPERATIONS
Business Combinations. During the fourth quarter of fiscal 2000, the
Company acquired VirSim, a software product, from Innoveda, Inc., for a purchase
price of approximately $7.0 million in cash. The purchase price of the
transaction was allocated to the acquired assets based on their estimated fair
values as of the date of the acquisition. Amounts allocated to intangible assets
and goodwill are being amortized on a straight-line basis over a three-year
period.
During the third quarter of fiscal 2000, the Company acquired The
Silicon Group, Inc. (TSG), a privately held provider of integrated circuit (IC)
design and intellectual property (IP) integration services, for a purchase price
of $3.0 million, including cash payments of $1.8 million. The purchase price was
allocated to the acquired assets and liabilities based on their estimated fair
values at the time of the acquisition. Amounts allocated to intangible assets
and goodwill are being amortized on a straight-line basis over a four-year
period.
During the first quarter of fiscal 2000, the Company acquired Leda, S.A.
(Leda), a privately held provider of RTL coding-style-checkers, for a purchase
price of $7.7 million, including cash payments of $7.5 million. The purchase
price of the transaction was allocated to the acquired assets and liabilities
based on their estimated fair values as of the date of the acquisition. Amounts
allocated to developed technology, workforce and goodwill are being amortized on
a straight-line basis over a five-year period. Approximately $1.8 million was
allocated to in-process research and development and charged to operations
because the acquired technology had not reached technological feasibility and
had no alternative uses.
Disposition of Viewlogic PCB/Systems Business -- effectEffect on comparative
financial information.Comparative
Financial Information. The Company merged with Viewlogic in December 1997 in a
transaction accounted for as a pooling-ofpooling of interests. On October 2, 1998, the
Company sold the printed circuit board and electronics systems business
(PCB/Systems business) of Viewlogic. In the discussion below, financial
information for fiscal 1999 excludes the PCB/Systems business, while financial
information for fiscal 1998 includes the results of the PCB/Systems business.
Therefore, the comparative measures included in the discussion, in particular
with respect to absolute dollar amounts of revenue or expenditure, are not
necessarily valid with respect to the Company's business as it is presently
conducted. A pro forma unaudited consolidated statement of income for 1998,
excluding the results of the PCB/Systems business and certain unusual charges,
was filed with the Securities and Exchange Commission (SEC) on Form 8-K on
January 25, 1999.
Revenue. Revenue consists of fees for licenses and subscriptions of the
Company's software products, sales of system products, maintenance and support,
customer training, and consulting.products. The Company's total revenue increaseddecreased by 12%3% in
fiscal 2000 compared to $806.1fiscal 1999. The decrease in revenue in fiscal 2000 was
primarily attributable to changes we made to our license model at the beginning
of the fourth quarter of fiscal 2000. Total revenue for the one month transition
period ended October 31,1999 was $23.2 million with product and service revenue
of $4.2 million and $19.0 million, respectively. This is compared to the one
month ended October 31, 1998 with total revenue of $28.2 million with product
and service revenue of $9.9 million and $18.3 million, respectively.
On July 31, 2000, Synopsys introduced Technology Subscription Licenses
(TSLs). TSLs are time-limited rights to use Synopsys software. The terms of
TSLs, and the payments due thereon, may be structured flexibly to meet the needs
of the customer. For creditworthy customers, payments will often extend over the
entire term of the license. With minor exceptions, under TSLs, customers cannot
obtain major new products developed or acquired during the term of their license
without making an additional purchase. TSLs will be structured so that both
product and service revenue will generally be recognized ratably over the term
of the license, or as payments become due. We expect that the average duration
of TSLs will be approximately three years.
Synopsys expects that approximately 75% of its new product orders will
be for TSLs and approximately 25% will be for perpetual licenses, in each case
plus or minus 5%. Synopsys believes that the principal benefits of TSLs will be
that Synopsys will (i) be able to offer customers technology and terms that more
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18
closely match their needs; (ii) have greater visibility into our earnings
stream; (iii) see improvements in the pricing environment for our products; and
(iv) be able to roll out our new technology in a more planned manner.
The replacement of time-based licenses by subscription licenses will
impact our reported revenue, and reported revenue declined in the fourth quarter
of fiscal 2000, as compared to both the fourth quarter of fiscal 1999 and the
third quarter of fiscal 2000. Under a subscription license, relatively little
revenue is recognized during the quarter the product is delivered, and the rest
goes into deferred revenue to be recognized over the term of the license. Under
the old form of time-based license, generally all license revenue has been
recognized in the quarter the product is delivered, with relatively little going
into deferred revenue. Therefore, an order for subscription licenses will result
in much less current-quarter revenue than an equal-sized order for the old form
of time-based license.
Product revenue decreased by 13% to $442.5 million in fiscal 2000 from
$505.8 million in fiscal 1999 from $717.9 million in fiscal 1998 and by 11% from
$647.0 million in fiscal 1997 compared to fiscal 1998. The percentage of the
Company's total revenue attributable to software and system products increased
to 63% in fiscal 1999 from 60% in fiscal 1998 and remained flat in fiscal 1998
compared with fiscal 1997.
Product revenue increased by 17% to $505.8 million in fiscal 1999 from $431.0 million in fiscal
1998 and by 6% from $408.3 million in fiscal 1997
compared to fiscal 1998. For each1999. The decrease in fiscal 2000 is primarily due to
the change in the license model to TSLs, which are recognized ratably over the
term of the years, these increases werelicense. The increase in fiscal 1999 is primarily due to increased
worldwide licensing and sales of the Company's EDA software products such as
synthesis, verification and system level design software products. Service
revenue increased by 5%14% to $341.3 million in fiscal 2000 from $300.3 million in
fiscal 1999 and by 5% from $287.0 million in fiscal 1998 and by 20% from $238.7 million in fiscal 1997
compared to fiscal
1998.1999. For each of the years, these increases were primarily attributable to the
renewal of maintenance and support contracts for EDA products and growth in
customer training and consulting services.
Revenue from international operations was $327.0 million, $275.2 million
and $279.8 million, or 42%, 34% and $262.2 million, or 34%, 39% and 41% of total revenue in fiscal 2000, 1999
1998
and 1997,1998, respectively. The decreaseincrease in international revenue as a percentage of
total revenue in fiscal 2000 compared to fiscal 1999 was primarily a result of
relatively greater revenue growth in Japan and Asia Pacific. This revenue
increase for this region is due to the continued economic recovery in the
Pacific Rim and the Company's increased sales focus in this region during fiscal
2000. Revenue from our international operations decreased 31% to $8.7 million
for the one month transition period ended October 31, 1999, compared to $12.5
million for the one month ended October 31, 1998. This decrease is attributed to
reduced customer shipment requests to receive licenses in October 1999.
International revenue represented approximately 37% and 44% of total revenue for
the one-month ended October 31, 1999 and 1998, respectively.
Revenue -- Product Groups. For management reporting purposes, the
Company's software products have been organized into four distinct product
groups -- IC Implementation (composed of two product categories, DC Family and
Physical Synthesis), Verification and Test, IP and Systems Design, Transistor
Level Design (TLD), and a services group -- Synopsys(R) Professional Services.
The following table summarizes the performance of the various groups as a
percentage of total company revenue:
YEAR ENDED
OCTOBER 31, YEARS ENDED SEPTEMBER 30,
----------- -------------------------
(in thousands) 2000 1999 1998
- -------------- ----------- ------ -------
Revenue:
IC Implementation
DC Family 35% 39% 36%
Physical Synthesis 4% 1% --
Verification and Test 30% 26% 21%
IP and System Level Design 14% 14% 22%(1)
Transistor Level Design 7% 12% 11%
Professional Services 10% 8% 10%
--- --- ---
Total Company 100% 100% 100%
=== === ===
(1) Includes revenue from Viewlogic's systems & PCB design business. The
segment was sold to a management-led buy-out group during fiscal 19981998.
IC Implementation. During fiscal 2000, the Company introduced Physical
Compiler, a product that unifies synthesis, placement and global routing.
Included in the Physical Synthesis family are Chip Architect, the Company's chip
floor-planning product, Flex Route, the Company's high-level router and the
Company's detailed routing technology. This product family contributed revenue
of $32.6 million during fiscal 2000. The Company expects continued increases in
the revenue contribution from the Physical Synthesis family in future years. The
decline in revenue contribution percentage of the DC family from fiscal 1999 to
fiscal 2000 reflects the maturation of the market for Design Compiler and the
beginning of what we believe is a transition from the DC family to the newer
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generation of products. The Company expects that revenue and orders from the DC
family will remain approximately flat from fiscal 2000 to fiscal 2001, and then
will begin to decline. Future revenue growth in the IC Implementation product
group is anticipated to come from the Physical Synthesis product family.
Verification and Test. Verification and Test includes the Company's
simulation, timing analysis, formal verification and test products. The increase
in percentage of total company revenue from fiscal 1999 to fiscal 2000 is due to
greater demand for verification products from our customers. The Company expects
demand for verification products to continue to increase as both systems and
semiconductor companies experience a crisis in verification.
Intellectual Property and System Level Design (IP&SG). The Company's
Intellectual Property and System Level Design products include DesignWare,
models, system design products and cell libraries (recently sold to Artisan
Components -- see Note 10, Subsequent Events, of Notes to Synopsys' Consolidated
Financial Statements). Revenue contribution has remained relatively constant
over the last three fiscal periods, even with the Viewlogic's Systems & PCB
design business segment sale. Revenue growth within the IP&SG group has come
primarily from DesignWare, as this product has grown significantly faster other
products with in the group.
Transistor Level Design. The Company's transistor level design products
include the products acquired though the acquisition of Epic Design Technology,
which was completed in fiscal 1997. These tools are used in the transistor-level
simulation and analysis. The decline in revenue contribution from 12% in fiscal
1999 to 7% in fiscal 2000 was due primarily to the lack of significant large orders during
fiscal 2000 and the effects of competition. This decline also impacted overall
Company performance in fiscal 2000. The Company believes the technology embedded
in these tools will have significant value to our customers as these customers
migrate to smaller geometries in their chip designs.
Professional Services. The Company's Professional Services group
includes consulting and training activities as well as the Company's new
Internet Design Service Business. The Professional Services group provides a
comprehensive portfolio of consulting services covering all critical phases of
the system-on-a-chip development process, as well as systems development in
wireless and broadband applications. The increase in the total Company revenue
contribution for this services group from 8% in fiscal 1999 to 10% in fiscal
2000 is due largely to the increased demand for the Company's productsturnkey design and
services in the U.S.wireless and unchanged demand in Japan.broadband consulting services. The decrease in international revenue as a percentage
of total revenueCompany anticipates continued
growth in fiscal 1998 compared to fiscal 1997 was due primarily to
decreased revenue in Asia/Pacific and Japan as a result of the economic turmoil
in many Asia/Pacific markets. This decrease was partially offset by growth in
European revenue in fiscal 1998.2001.
Cost of Revenue. Cost of product revenue includes cost ofpersonnel and related
costs, production personnel,costs, product packaging, documentation, amortization of
capitalized software development costs and purchased technology, and costs of
the components of the Company's hardware system products. The cost of internally
developed capitalized software is amortized based on the greater of the ratio of
current product revenue to the total of current and anticipated product revenue
or the straight-line method over the software's estimated economic life of
approximately two years. Cost of product revenue remained relatively flat at 5%was 10% of total product
revenue infor fiscal 19992000, as compared to 5%8% for fiscal 1999. The increase in cost
of product revenue is due primarily to the change in the license strategy
introduced in Q4 of fiscal 2000. The Company's product costs are relatively
fixed and do not fluctuate significantly with changes in revenue or changes in
revenue recognition methods. Cost of product revenue for fiscal 1998 was 8% of
total revenue in fiscal 1998 and 6% of total revenue in fiscal
1997. The reduction from fiscal 1998 to fiscal 1997 was due to the Company
realizing efficiencies in its software distribution infrastructure.product revenue. Cost of service revenue includes personnel and the
related costs associated with providing training and consulting services. Cost
of service revenue as a percentage of total service revenue was 9%24% in fiscal
2000, 23% in fiscal 1999 and 8% of total revenue20% in both fiscal 1998 and 1997.1998. The increaseincreases in cost of service
fromrevenue over the last two fiscal 1998 was
due toperiods results from the continued investment
in the Company's infrastructure required to expand its consulting and training
businesses. For the one-month transition period ended October 31, 1999, cost of
revenue, as a percentage of total revenue was 32% compared to 31% for the one
month ended October 31, 1998. The increase in cost of revenue resulted primarily
from increased royalties and consulting practice.
19
20personnel costs relating to maintenance and
support. The Company expects that cost of revenue in fiscal 2001 will remain
flat or increase slightly. In addition, fiscal 2001 will include an additional
week of operations due to the method by which we determine our fiscal year.
Research and Development. Research and development expenses increased by
7%13% to $189.3 million in fiscal 2000, from $167.1 million in fiscal 1999, fromand by
7% in fiscal 1999 compared to $156.7 million in fiscal 1998 and by 7%
from $146.8 million in fiscal 1997 compared to fiscal 1998, net of capitalized
software development costs. Research and development expenses represented 21%24%,
22%21% and 23%22% of total revenue in fiscal 2000, 1999 1998 and 1997,1998, respectively. The
increase in absolute dollars reflects the Company's ongoing research and
development efforts in a wide variety of areas such as tools for the design of
systems-on-a-chip and physical design tools.development. A significant portion of the increase for each fiscal year was due
to the addition of personnel and personnel related costs, partly through
acquisitions, for enhancement of existing applications and development of next generationnew
products. Also, fiscal 1998 included an additional week of operations, which was
partially offset by synergies realized from the integration of Viewlogic into
Synopsys' operations. Research and development expenses for the one-month
transition period ended October 31, 1999 were $17.2 million as compared to $14.9
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20
million for the one-month ended October 31, 1998. This increase can be
attributed to increases in personnel and personnel related costs. The Company
anticipates that it will continue to commit substantial resources to research
and development in the future, provided that it is able to continue to hire and
retain a sufficient number of qualified personnel. If the Company believes that
it is unable to enter a particular market in a timely manner, it may license
technology from other businesses or acquire other businesses as an alternative
to internal research and development. ForFiscal 2001 will include an additional
week of operations due to the method by which we determine our fiscal 2000, the Company
expects that research and development expenses as a percentage of total revenue
will be at or slightly below the fiscal 1999 level.year.
Sales and Marketing. Sales and marketing expenses decreasedincreased by 2%20% to
$288.8 million in fiscal 2000 from $241.6 million in fiscal 1999 and decreased
by 2% from $245.4 million in fiscal 1998 and increased by 2%
from $240.6 million in fiscal 1997 compared to fiscal 1998.1999. Sales and
marketing expenses represented 30%37%, 34%30% and 37%34% of total revenue in fiscal 2000,
1999 and 1998, respectively. Total expenses increased in absolute dollars and 1997, respectively.as
a percentage of revenue in fiscal 2000 primarily as a result of increases in
personnel related costs. Total expenses decreased in absolute dollars and as a
percentage of revenue in fiscal 1999 primarily as a result of the divesturedivestiture of
the PCB/Systems business, as well as savings resulting from ongoing integration
of Viewlogic's other operations into the Company as a whole. These reductions
were partially offset by increased spending in marketing and advertising costs,
trade shows and travel-related costs. The fiscal 1998
increase over fiscal 19971999 primarily resulted from the additionadditional week of
personneloperations. Sales and personnel-related costs
duemarketing expenses for the one-month transition period
ended October 31, 1999 were $19.0 million as compared to $16.9 million for the
one-month ended October 31, 1998. This increase primarily related to the continued growth ofhigher
costs associated with the Company's worldwide sales and marketing
organizations and an increase in professional services.1999 annual business planning events. Fiscal 1998 also
included2001 will
include an additional week of operations. The Company expects that foroperations due to the method by which we determine
our fiscal 2000, sales and marketing expenses as a percentage of total revenue will be at
or slightly below the fiscal 1999 level.year.
General and Administrative. General and administrative expenses
remained
relatively constant atincreased to $59.2 million in fiscal 2000 compared to $47.1 million in fiscal
1999 compared to $47.2 million in
fiscal 1998.1999. General and administrative expense decreased slightly from $47.3$47.2 million
in fiscal 19971998 compared to fiscal 1998.1999. As a percentage of total revenue,
general and administrative expenses were 6%8%, 7%6% and 7% in fiscal 2000, 1999 1998 and
1997,1998, respectively. In fiscal 1998, general2000, the increase in absolute dollars and
percentage of revenue was primarily due to increases in bad debt expense,
personnel costs, facility expenditures and patent and proxy services. General
and administrative expenses includedfor the one-month transition period ended October
31, 1999 were $5.7 million as compared to $4.9 million for the one-month ended
October 31, 1998. This increase was primarily a result of higher professional
service fees. Fiscal 2001 will include an additional week of operations; however,operations due to
the associatedmethod by which we determine our fiscal year.
Operating Expense Targets -- Fiscal 2001. For Fiscal 2001, our target
for overall operating expense increases were offset by synergies realized from the integration of Viewlogic
into Synopsys' operations. The Company expects that forgrowth over fiscal 2000, general and
administrative expenses as a percentagebefore the amortization
of total revenue will be at or slightly
below the fiscal 1999 level.intangible assets, is 2.5% to 3.5%.
Amortization of Intangible Assets. Amortization of intangible assets
represents the excess of the aggregate purchase price over the fair value of the
tangible and identifiable intangible assets acquired by the Company and, isCompany. Under the
Company's accounting policies, intangible assets as of October 31, 2000,
including goodwill, are being amortized over the estimated useful life of fourthree
to five years.five-year periods. The Company assesses the recoverability of intangible assetsgoodwill by
determining whether the amortized asset over its useful life may be recovered
through estimated usefulfuture undiscounted cash flows. A
review of the intangible assets has been completed and it has been determined
that the values are properly stated and no adjustments are required. Amortization of intangible
assets charged to operations in fiscal 2000 was $15.1 million as compared to
$7.9 million for fiscal 1999. Amortization of intangible assets charged to
operations for the one-month ended October 31, 1999 was $7.9
million and$1.2 million.
Amortization of intangible assets for the one-month ended October 31, 1998 was
not material for fiscal 1998 or 1997.material.
Merger-Related and Other Costs. As a result of various business
combinations accounted for as pooling-of-interests inpooling of interests during fiscal 1998, and 1997, the
Company incurred merger-related and other costs of $51.0 million and $11.4
million, respectively.million. These expenses
related to transaction costs, employee termination and transition costs, legal
costs, write-off of equipment and other assets, and redundant facility and other
costs. AsDuring fiscal 1999 and fiscal 2000, the Company did not incur any
merger-related or other costs related to business combinations accounted for as
a pooling of September 30, 1999, there
was a balance of $0.4 million remaining in accrued liabilities which was
utilized for final settlement expenditures in October 1999.
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In-processinterests.
In-Process Research and Development. The following paragraphs contain
forward-looking statements within the meaning of Section 21E of the Securities
Exchange Act of 1934, including statements and assumptions regarding percentage
of completion, expected product release dates, dates for which we expect to
begin generating benefits from projects, expected product capabilities and
product life cycles, costs and efforts to complete projects, growth
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21
rates, royalty rates and projected revenue and expense information used by us to
calculate discounted cash flows and discounts rates. These forward-looking
statements involve risks and uncertainties, and the cautionary statements set
forth below and in "Factors that May Affect Future Results" identify important
factors that could cause actual results to differ materially from those
predicted in any such forward-looking statement.
Purchased in-process research and development (IPRD) of $21.2$1.7 million and
$33.1$21.2 million in fiscal 2000 and 1999 and 1998 respectively, representsrepresent the write-off of
in-process technologies associated with our acquisitions of Leda in fiscal 2000
and Gambit Automated Design, Inc. (Gambit), Stanza Systems, Inc. (Stanza),
Smartech, the rights to CoverMeter, a software product owned by Advanced
Technology Center, and Apteq Design Systems, Inc. (Apteq), in fiscal 1999 and Systems Science, Inc. (SSI) and
two privately held companies in fiscal 1998 (collectively, the Acquired
Companies).1999. At
the date of each acquisition the projects associated with the IPRD efforts had
not yet reached technological feasibility and the research and development in
process had no alternative future uses. Accordingly, these amounts were expensed
on the respective acquisition dates of each of the Acquired Companies. Also(Also see
Note 2,3, Business Combinations.Combinations, of Notes to Synopsys' Consolidated Financial
Statements.)
Valuation of IPRD. We calculated amounts allocated to IPRD using
established valuation techniques in the high technology industry and expensed
such amounts in the quarter that each acquisition was consummated because
technological feasibility had not been achieved and no alternative future uses
had been established. This approach gave consideration to relevant market sizes
and growth factors, expected industry trends, the anticipated nature and timing
of new product introductions by us and our competitors, individual product sales
cycles, and the estimated life of each products' underlying technology.
The fair value of the in-process technology was based on a discounted
cash flow model, similar to the traditional "Income Approach," which discounts
expected future cash flows to present value, net of tax. In discounting the
estimated cash flows, the discount rates used in the present value calculations
were typically derived from a discount rateweighted-average cost of 25% was used based oncapital analysis,
adjusted upward to reflect additional risks inherent in the development life
cycle, the risks associated with achieving such projected cash flows upon
successful completion of the acquired projects expected incremental revenues and expenses associated
with the projects utilizing the acquired technology, and risks and uncertainties
in incorporating the acquired technology into the Company's development
projects.
In developing cash flow projections, revenues were forecasted based on
relevant factors, including aggregate revenue growth rates for the business as a
whole, characteristics of the potential market for the technology and the
anticipated life of the technology. Projected annual revenues for the in-process
research and development projects were assumed to ramp up initially and decline
significantly at the end of the in-process technology's economic life. Operating
expenses and resulting profit margins were forecasted based on the
characteristics and cash flow generating potential of the acquired in-process
technology. Gross profit percentage and tax rate were assumed to approximate the
Company's corporate gross profit percentage average and its effective tax rate.
Associated risks include the inherent difficulties and uncertainties in
completing each project and thereby achieving technological feasibility, and
risks related to the impact of potential changes in the market conditions and
technology. We do not expect to achieve a material amount of expense reductions
or synergies; therefore, the valuation assumptions do not include significant
anticipated cost savings.
As of September 30, 1999, the Company's research and development
expenditures since the acquisitions of fiscal 1999 have not differed materially
from expectations. The projections the Company used in performing its valuations
with respect to each acquisition are still valid, in all material respects,
however, there can be no assurance that the projected results will be achieved.
With respect to the Company's acquisitions completed in fiscal 1998, management
believes that the projections the Company used in performing its valuations with
respect to each acquisition are still valid, in all material respects, however,
there can be no assurance that the projected results will be achieved.
Management expects to continue the development of each project and believes that
there is a reasonable chance of successfully completing such development
efforts. However, there is risk associated with the completion of the in-process
projects and there can be no assurance that any project will meet with either
technological or commercial success. Failure to successfully develop and
commercialize
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these in-process projects would result in the loss of the expected economic
return inherent in the fair value allocation. Additionally, the value of other
intangible assets acquired may become impaired. The risks associated with the
research and development are still considered high and no assurance can be made
that upcoming products will meet market expectations. As of September 30, 1999,
and for each of the three fiscal years then ended, the impact upon our
consolidated results of operations or financial position with respect to the
success, or lack thereof, related to any acquisition, individually or in
aggregate, is not considered material.
Other Income, Net. Other income, net was $40.8 million, $37.0 million
$26.0 million and $24.4$26.0 million, or 5%, 4%5% and 4% of total revenue in fiscal 2000, 1999 1998 and
1997,1998, respectively. Other income, net increased in absolute dollars each fiscal
year primarily due to higher averageinterest income from higher invested cash and short-term investment balances
which yielded
more interest income forin fiscal 1999 comparedand from a higher mix of taxable to tax-exempt investments in
fiscal 1998.2000. In addition, in fiscal 2000, 1999 1998 and 19971998 other income, net
increased due to gains realized on sales of equity investments. Other income,
net for the one-month transition period ended October 31, 1999 was $1.7 million
as compared to $1.1 million for the one-month ended October 31, 1998.
Interest Rate Risk. The Company's exposure to market risk for changes in
interest rates relatesrelate primarily to its investment portfolio. The Company does
not use derivative financial instruments for speculative or trading purposes.purposes
with respect to its cash and short-term investments. The Company places its
investments in a mix of tax exempttax-exempt and taxable instruments that meet high credit
quality standards, as specified in the Company's investment policy. The policy
also limits the amount of credit exposure to any one issue, issuer and type of
instrument. The Company does not anticipate any material loss with respect to
its investment portfolio.
The following table presents the carrying value and related
weighted-average after tax interest rates for the Company's investment portfolio.portfolio
at October 31, 2000. The carrying value approximates fair value at September 30, 1999.that date. In
accordance with the Company's investment policy, all investments mature in
fifteen months or less.
Principal (Notional) Amounts in U.S. Dollars:
CARRYING AVERAGE
AMOUNT INTEREST RATE(in thousands, except interest rates)
Weighted
Avg.
Carrying After Tax
Amount Interest Rate
-------- -------------
(in thousands, except interest rates)
Cash equivalents --- fixed rate..............................rate $ 24,964 3.66%9,993 4.40%
Short-term investments --- fixed rate........................ 418,745 3.97%rate 282,519 4.51%
--------
Total investment securities............................ 443,709 3.95%securities 292,512 4.50%
Money market funds -- variable rate......................... 157,966 3.69%rate 59,377 4.40%
--------
Total interest bearing instruments..................... $601,675 3.88%instruments $351,889 4.49%
========
(See Note 34, Financial Instruments, in accompanying notes to consolidated
financial statements for additional information on investment maturity dates,
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long-term debt and equity price risk related to the Company's long-term
investments.)
Foreign Currency Risk. At the present time, the Company does not
generally hedge anticipated foreign currency cash flows but hedges only those
currency exposures associated with certain assets and liabilities denominated in
nonfunctional currencies and does not generally hedge anticipated foreign
currency cash flows.currencies. Hedging activities are undertaken by the Company and are
intended to offset the impact of currency fluctuations on these balances. The
success of this activity depends upon estimationsestimates of intercompany balances
denominated in various currencies, primarily the Japanese yen British pound
sterling, German mark, French franc and Italian lira.the euro. The
Company had contracts for the sale and purchase of foreign currencies with a
notional value expressed in U.S. dollars of $45.0$47.5 million. These contracts were denominated in currencies
which approximated the fair value of such contracts and their underlying
transactions as of September 30, 1999. Looking forward, the
Company does not anticipate any material adverse effect on its consolidated
financial position, results of operations, or cash flows resulting from the use
of these instruments. There can be no assurance in the future that these hedging
transactions will be effective.
The following table provides information about the Company's foreign
exchange forward contracts at September 30, 1999.October 31, 2000. Due to the short-term nature of
these contracts, the contract rate approximates the
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23
weighted-average contractual foreign currency exchange rate and the amount in U.S. dollars approximates the fair value of the
contract at September 30, 1999.October 31, 2000. These forward contracts mature in approximately
thirty days.
Short-Term Forward Contracts to Sell and Buy Foreign Currencies in U.S. Dollars
Related to Intercompany Balances:
CONTRACT
AMOUNT RATE
-------(in thousands)
Contract
Amount Rate
-------- --------
(in thousands, except for average contract rates)
Forward Contracts:Contract Values:
Japanese yen.............................................. $30,413 103.67
British pound sterling.................................... 671 .61
German mark............................................... 3,682 1.86
French franc.............................................. 9,841 6.25
Italian lira.............................................. 370 1,847.75Yen $ 25,471 107.27
Euro $ 22,050 0.83733
The unrealized gains/losses on the outstanding forward contracts at
September 30, 1999October 31, 2000 were immaterial to the Company's consolidated financial
statements. The realized gain/lossesloss on these contracts as they matured waswere not
material to the Company's consolidated financial position, results of
operations, or cash flows for the periods presented.
Derivative Financial Instruments. Apart from its foreign currency
hedging and forward sales of certain equity investments, the Company does not
use derivative financial instruments. In particular, the Company does not use
derivative financial instruments for speculative or trading purposes.
Extraordinary Items. During fiscal 2000 and 1999, the Company incurred
no extraordinary gains or losses. During the first quarter of fiscal 1998, the
Company recorded an extraordinary gain on extinguishment of debt of $1.9
million, net of income tax expense of $1.0 million, related to the cancellation
of certain interest bearing notes issued by the Company to International
Business Machines Corporation (IBM).
During the fourth quarter of fiscal 1998, Synopsys completed the partial
spin-off of Viewlogic Systems, Inc. (VSI), a company that owns the printed
circuit board (PCB)/(PCB/Systems businessbusiness) of Viewlogic. Synopsys' merger with
Viewlogic in December 1997 was accounted for as a pooling-of-interests.pooling of interests. The
spin-off was accounted for as an extraordinary item, as provided by paragraph 60
of Accounting Principles Board Opinion No. 16 (APB 16), and Synopsys recorded an
extraordinary gain, net of income tax expense, of $26.5 million in fiscal 1998
in respect to the spin-off. Synopsys retained common stock equal to 14.9 percent14.9% of the
fully diluted equity in VSI.
The Company concluded that the disposition of VSI was consistent with
its treatment of the Synopsys-Viewlogic merger as a pooling-of-interests.pooling of interests. A
condition of the pooling-of-interests treatment is that at the time of the
merger, management did not plan to dispose of any significant part of the assets
of the merged entity. The Company concluded that this condition was met because,
on the date of the Synopsys-Viewlogic merger, the Company did not plan to
dispose of the PCB/Systems business. The Company believed that there would be
synergies between the Company's "high-level" integrated circuit design products
and VSI's PCB design products. The ultimate decision to spin-off VSI was based
on changes in circumstances following the Synopsys-Viewlogic merger.
During the months following the merger, the Company came to realize that
certain of its assumptions and expectations regarding the operation of the
PCB/Systems business as part of Synopsys were not being fulfilled. The Company's
initial intent to retain VSI altered due to changes in circumstances as follows:
- A number of engineers working in the PCB/Systems business were
hired by competitors, and management became concerned that it
would lose more if the business remained part of Synopsys.
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- Certain synergies anticipated from operation of the PCB/Systems
business as part of Synopsys did not materialize.
- The revenues of the PCB/Systems business grew more slowly than
those of Synopsys' other businesses. Management concluded that
the reduction in the Company's overall growth rate caused by the
PCB/Systems business was contributing to a market discounting of
the Company's stock value.
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- Managers of the PCB/Systems business concluded that the business
could grow faster if it was a stand-alone entity, which would
allow them to attract and retain key employees.
Accordingly, Synopsys has not changed its accounting for the Viewlogic
merger and has reported the gain on the VSI disposition as an extraordinary
item.
EFFECT OF NEW ACCOUNTING PRONOUNCEMENTS
During fiscal 1999,STANDARDS
In December 1998, the Company early adoptedAICPA issued Statement of Position (SOP) 98-9,
Modification of SOP 97-2, Software Revenue Recognition, With Respect to Certain
Transactions, which amends SOP 97-2 and supercedes SOP 98-4. The Company adopted
SOP 98-9 during fiscal 2000. The adoption of the statement did not have a
material impact on the Company's consolidated financial position or results of
operations, as the Company modified certain business practices. See Note 1 to
Notes to Synopsys' Consolidated Financial Statements.
In fiscal 2000, the Emerging Issues Task Force (EITF) published their
consensus on EITF Issue No. 00-2, Accounting for Web Site Development Costs,
which requires that costs incurred during the development of web site
applications and infrastructure, including developing software to operate the
web site, and including graphics that affect the "look and feel" of the web page
and all costs relating to software used to operate a web site should be
accounted for under Statement of Position 98-1, Accounting for the Costs of
Computer Software Developed or Obtained for Internal Use. This statement requires computer software costs incurred during
the application development stage to be capitalized and amortized to operations
over the software's estimated useful life.Use, (SOP 98-1). The
Company adopted EITF No. 00-2 in fiscal 2000. The adoption did not have a
material effect of adopting SOP 98-1 for
fiscal 1999 was not material to the Company'son our consolidated financial position or results of operationsoperations.
In fiscal 2000, the EITF published their consensus on Issue No. 00-3,
Application of AICPA Statement of Position 97-2, Software Revenue Recognition,
to Arrangements That Include the Right to Use Software Stored on Another
Entity's Hardware. The Issue states that a software element covered by SOP 97-2
is only present in a hosting arrangement if the customer has the contractual
right to take possession of the software at any time during the hosting period
without significant penalty and it is feasible for the customer to either run
the software on its own hardware or cash flows.contract with another party unrelated to the
vendor to host the software. The Company recently introduced a software hosting
service. Synopsys hosting services agreements now in place do not grant
customers the right to take possession of hosted software without an additional
charge.
In June 1999,fiscal 2000, the Financial Accounting Standards Board (FASB) issued
SFASInterpretation No. 44, Accounting for Certain Transactions involving Stock
Compensation, an interpretation of APB Opinion No. 25. This Interpretation
clarifies the application of Opinion 25 for certain issues including: (a) the
definition of employee for purposes of applying Opinion 25, (b) the criteria for
determining whether a plan qualifies as a noncompensatory plan, (c) the
accounting consequence of various modifications to the terms of a previously
fixed stock option or award, and (d) the accounting for an exchange of stock
option awards in a business combination. The Company adopted Interpretation 44
in fiscal 2000 and the adoption did not have a material effect on our
consolidated financial position or results of operations.
In June 1999, the FASB issued Statement of Financial Accounting
Standards (SFAS) Nos. 137 and 138, Accounting for Derivative Instruments and
Hedging Activities, which amends the effective date of SFAS No. 133, Accounting
for Derivative Instruments and Hedging Activities. SFAS No. 137133 establishes
accounting and reporting standards for derivative financial instruments and
hedging activities and requires the Company to recognize all derivatives as
either assets or liabilities on the balance sheet and measure them at fair
value. Gains and losses resulting from changes in fair value would be accounted
for based on the use of the derivative and whether it is designated and
qualifies for hedge accounting. The Company will adopt SFAS No. 137 as required133 for itsthe
fiscal 2001
Annual Report on Form 10-K. The Company has not determined the impact that SFAS
No. 137 will have on its financial statements and believes that such
determination will not be meaningful until closer to the date of the initial
adoption.
In December 1998, the AICPA issued SOP 98-9, Modification of SOP 97-2,
Software Revenue Recognition, With Respect to Certain Transactions, which amends
SOP 97-2 and supercedes SOP 98-4. The Company will adopt SOP 98-9 in fiscalyear beginning November 1, 2000. The Company intendsdoes not expect to modify certain aspectshave a
transition adjustment related to the adoption of SFAS 133.
23
24
During fiscal 2000, the Securities and Exchange Commission issued Staff
Accounting Bulletin No. 101 ("SAB 101"), Revenue Recognition in Financial
Statements. The objective of SAB 101 is to provide further guidance on revenue
recognition issues in the absence of authoritative literature addressing a
specific arrangement or a specific industry. The Company is required to adopt
the guidance in SAB 101 no later than the fourth quarter of its license and pricing
structure so thatfiscal year
2001. Adoption of this guidance is not expected to have a material impact on the
impactCompany's financial position or results of SOP 98-9 on its revenue recognition practices
will not be significant.
In June 1997, FASB issued SFAS No. 131, Disclosures about Segments of an
Enterprise and Related Information. SFAS No. 131 requires disclosure of certain
information regarding operating segments, products and services, geographic
areas of operation, and major customers. The Company has adopted SFAS No. 131 as
required for its fiscal 1999 Annual Report on Form 10-K.operations.
LIQUIDITY AND CAPITAL RESOURCES
Cash, cash equivalents and short-term investments were $704.2$435.6 million at
September 30, 1999, an increaseOctober 31, 2000, a decrease of $99.6$273.8 million or 17%39% from fiscal 1998.October 31, 1999. The
increasedecrease is primarily a result of cash outflow for financing and investing
activities, mainly the repurchase of common stock of $397.5 million, capital
expenditures of $68.5 million, cash paid for acquisitions of $14.5 million, and
cash paid on debt obligations of $14.3 million. These outflows were partially
offset by cash generated by operations of $223.3$151.1 million and to a lesser extent, through financinginvesting
and investingfinancing activities, mainly the exercise of stock options and purchasessale of stock
through the employee stock purchase plan of $102.7$59.5 million, and theproceeds from
sale of long-term investments of $21.8 million. These cash flows were partially offset by cash outflows for
investing and financing activities, mainly capital expenditures of $65.8
million, acquisitions valued at $46.5 million, the repurchase of common stock of
$95.4 million and cash paid on debt obligations of $12.6$24.3 million.
Accounts receivable increased 23%12% during fiscal 1999,2000, while sales
grewdeclined by 12%.3% to $783.8 million in fiscal 2000 from $806.1 million in fiscal
1999. Days sales outstanding in receivables increased to 6199 days as of September
30, 1999October
31, 2000 from 5961 days at September 30, 1998.1999, largely as a result of decreased
revenue in the fourth quarter of fiscal 2000 as compared to the same period in
fiscal 1999. The decrease in revenues during the fourth quarter of fiscal 2000
was the result of a change in the Company's license and pricing strategy. As of
September 30, 1999 and 1998,October 31, 2000, the Company had sold $22.8 million and $12.6 millionremaining balance of itsthe Company's accounts receivable
sold to a financial institution.
At September 30, 1999, the Company had two foreign exchange lines of credit
available totaling $120.0 million, which expire in July and October 2000.
24
25institution was $5.3 million.
The Company's management believes that its current cash, cash
equivalents, short-term investments, lines of credit, and cash generated from operations will
satisfy its expected working capital and capital expenditure requirements for at
least the next twelve months.
YEAR 2000 READINESS
This section contains forward-looking statements. See "Factors That May
Affect Future Results."
Year 2000 Problem. The failure of a computer program to accurately
recognize and process date information beginning on January 1, 2000 is referred
to as a "Year 2000 problem." This may result in a system failure, miscalculation
or other malfunction.
Synopsys has potential Year 2000 problems both as a vendor of software and
as a user of software and other services. As a vendor, Synopsys could have Year
2000 issues either if our software products were not Year 2000 compliant or our
customers had Year 2000 issues that interfered with their purchases of Synopsys'
products. Our business could also be disrupted if any of the many systems we use
to perform key corporate functions -- such as financial accounting, billing,
payroll or license control, or the power, telecommunications and other services
they depend on -- were interrupted or damaged as a result of Year 2000 problems.
For the purposes of the following discussion, our efforts to identify,
assess, fix and test Year 2000 problems relating to our business are referred to
as our "Year 2000 Efforts."
State of Readiness. In general, Synopsys products are not date-sensitive,
and therefore are less likely to have Year 2000 problems. We have inspected or
tested all of our currently released products to determine whether they have
Year 2000 problems. None of our tested products experienced significant
date-related failures. In addition, we are operating a dedicated Year 2000 test
laboratory, which we use to test new products and maintain Year 2000 compliance
of future products.
Synopsys has taken a number of steps to determine whether the internal
computer systems and software we rely upon to run our business will have Year
2000 problems. Our efforts have covered both systems that are commonly thought
of as "information technology" (IT) systems, including accounting, data
processing, and telephone/PBX systems, as well as certain systems that are not
commonly thought of as IT systems, such as alarm systems and fax machines.
Our Year 2000 Efforts are being conducted primarily by Synopsys employees
and in Synopsys facilities. We began our Year 2000 Efforts in February 1997. As
of September 30, 1999, we had completed approximately 99% of the total effort
for the projects we believe are necessary to fully address potential Year 2000
issues relating to our internal computer systems and software. Our remaining
efforts are focused on upgrading certain desktop computers and servers for which
we delayed remediation work to enable us to provide support to customers using
Synopsys products on prior releases of their operating systems.
In addition to conducting an assessment of our products and internal
systems and software, we have conducted a survey of our most important vendors
and service providers. All such vendors have indicated that they are Year 2000
compliant.
Certain of our computer equipment and software has required replacement or
modification as a result of Year 2000 issues, including an upgrade to the
Windows operating system and related modifications affecting most of the desktop
computers used in our business. In certain instances, a replacement or
modification anticipated in the ordinary course of business was accelerated due
to Year 2000 issues.
Costs of Readiness. Synopsys has not incurred, and does not expect to
incur, material expense in connection with our Year 2000 Efforts. We currently
estimate that the total cost of our Year 2000 Efforts will not exceed $8.1
million, consisting of approximately $5.6 million for hardware, software and
external consultants (external costs), and approximately $2.5 million in direct
costs of employees working on our Year 2000 Efforts (internal costs). As of
September 30, 1999 we had incurred costs of approximately $5.5 million related
to our Year 2000 Efforts, including $3.5 million in external costs and $2.0
million in internal costs. The Company expects to incur additional depreciation
expenses of $2.1 million and additional personnel costs of approximately $0.5
million relating to its Year 2000 Efforts. However, should we encounter
unforeseen Year24
25 26
2000 problems, either in our products or internal systems or in our customers'
or vendors' operations, the amount we spend on our Year 2000 Efforts number
could increase, perhaps by a material amount. The cost of our Year 2000 Efforts
is being funded from operating cash flows. These costs represent approximately
5.7% of our total actual and anticipated IT expenditures for the period from the
start of fiscal 1998 through March 31, 2000 (including employee expenses of our
IT department). Expansion and upgrade of our internal systems unrelated to our
Year 2000 Efforts have not been materially delayed or impacted by our Year 2000
Efforts.
Contingency Plans. Synopsys has analyzed the operational problems that
would be reasonably likely to result from the failure by us or vendors to
achieve Year 2000 compliance on a timely basis. The most reasonably likely worst
case scenario we have identified is a disruption of our core operational
functions for one week. In conjunction with our overall crisis planning efforts,
we have developed a plan to address this scenario and to reduce the risk of
other Year 2000-related problems. Under this plan, the Company will (1)
partially shut down certain internal systems during the Year 2000 rollover and
(2) use standby electric generators to power key systems in case of a public
utility power outage. While we do not anticipate that this scenario will have a
material adverse effect on our business, we are not able to predict the
likelihood or the effects of the worst case scenario with certainty.
FACTORS THAT MAY AFFECT FUTURE RESULTS
Our Revenue and Earnings May Fluctuate. Many factors affect our revenue
and earnings, which makes it difficult to achieve predictable revenue and
earnings growth. Among these factors are customer product and service demand,
product license terms, and the timing of revenue recognition on products and
services sold. The following specific factors could affect our revenues and
earnings in a particular quarter or over several quarterly or annual periods:
- - Our orders have been, and are expected to continue to be, seasonal.
Historically, our first fiscal quarter has been our weakest, with a book-to-bill ratio less than 1. The recent
change in our fiscal year (see note 1 in accompanying notes to
consolidated financial statements) may affect the seasonal pattern of our
revenues.weakest.
- - Our products are complex, and before buying them customers spend a great
deal of time reviewing and testing them. Our customers' evaluation and
purchase cycles do not necessarily match our quarterly periods, and if by
the end of any quarter we have not sold enough new licenses, our orders
and revenues could be below our plan.periods. Like
many companies in the software industry, in the past we have received a
disproportionate volume of orders in the last week of a quarter, and recognized a disproportionate
amount of revenue in the last week of a quarter. In
addition, a large proportion of our business is attributable to our
largest customers. As a result, if any order, and especially a large
order, is delayed beyond the end of a fiscal period, our orders and
revenue for that period could be below our plan.
- - Accounting rules determine when revenue is recognized on our product and
service contracts, and therefore impact how much revenue we will report
in any given fiscal period. The accounting rules we are requiredauthoritative literature under which the
Company recognizes revenue has been, and is expected to follow permit uscontinue to recognize
revenue only when certain criteria are met. Ordersbe,
the subject of much interpretative guidance. In general, following the
change to our license model in the fourth quarter of fiscal 2000, most
orders for certain of our products and services yield revenue over multiple
quarters (often
extending(extending beyond the current fiscal year) or upon completion
of performance rather than at the time of sale. In addition, the contract is executed. The
specific terms agreed to with a customer may have the effect of
requiring deferral or acceleration of revenue in whole or in part or, alternatively, of permitting us to
accelerate the recognition of revenue for products to be used over
multiple years. A number of our recent transactions have involved
multi-year licenses with respect to which a significant portion of the
revenue was recognized in the initial quarter (consistent with relevant
accounting rules).part.
Therefore, for aany given quarterfiscal period it is possible for us to fall
short in our revenue and/or earnings plan even while orders and backlog
remain on plan or, conversely, to meet our revenue and/or earnings plan
by drawing onbecause of backlog and deferred revenue while orders are under plan.
- We recently introduced a new- In fiscal 2000, we modified the license and pricing structure for our
software products. Although weproducts twice. We believe that thesethe changes havewe made in August
2000 (the adoption of Technology Subscription Licenses) are producing
benefits for both Synopsys and our customers, but it isremains possible
that customer reaction will be unfavorable oror; that the transition to
the new structure will be disruptive to business, in either case
resulting in the deferral or loss of sales.
26
27sales, or that our planned mix of
license types will not be achieved.
Our Industry is Highly Competitive. The EDA industry is highly
competitive. We compete against other EDA vendors, and with customers'
internally developed design tools and internal design capabilities, for a share
of the overall EDA budgets of our potential customers. In general, competition
is based on product quality and features, post-sale support, price and, as
discussed below, the ability to offer a complete design flow. Our competitors
include companies that offer a broad range of products and services, such as
Cadence, Mentor and Avant!, as well as companies, including numerous start-up
companies, that offer products focused on a discrete phase of the integrated
circuit design process. In certain situations, Synopsys' competitors continue to offerhave been
offering aggressive discounts on certain of their products, in particular
onsimulation and synthesis and Verilog simulation products. If this behavior
continues,As a result, average prices for ourthese
products may fall. In order to compete successfully, we must continue to enhance
our products and bring to market new products that address the needs of our
customers. We also will have to expand our consulting services business. The
failure to enhance existing products, develop and/or acquire new products or
expand our ability to offer consulting services could have a material adverse
effect on our business, financial condition and results of operations.
Technology advances and customer requirements are fuelingcontinue to fuel a change
in the nature of competition among EDA vendors. Increasingly, EDA companies
compete on the basis of "design flows" involving integrated logic and physical
design toolsproducts (referred to as "physical synthesis" products) rather than on
the basis of individual "point" tools performing a discrete phase of the design
process. The need to offer products linking logic and physical designsynthesis products will become increasingly
important, as IC complexity is increasing, chip
production moves increasingly to 0.18 micronICs grow more complex. Our main physical synthesis product was
fully released in June 2000, and below, and system-on-a-chip
designs become more prevalent. Wehas been well received by customers, but we
still do not offer customers a wide range of logiccomplete design tools but
have only recently introduced our first physical design tools.flow. We are working on
completing our design flow, although for the foreseeable futurethere is no guarantee that we will not be able
to offer such a competitive flow to customers. The market for physical design tools
is dominated by Cadence and Avant! Both companies have acquired logic synthesis
technology and are offering, both of which offer products linking synthesis to theirlogic
and physical design
products.design. If we are unsuccessful in developing a complete design flow
25
26
on a timely long-term debt basis or in convincing customers to adopt our
integrated logical and physical design products and methodology, our competitive
position could be significantly weakened.
Our Revenue Growth Depends on OurNew and Non-Synthesis Products.
Historically, much of our growth has been attributable to the strength of our
logic synthesis products. OpportunitiesThese products accounted for growth35% of revenue in market share in this area are limited,fiscal
2000. We believe that orders and revenues fromfor our flagship logic synthesis
products are expected to grow more slowly than our
target for overall revenue growth. Inproduct, Design Compiler, peaked in fiscal 2000. Therefore, in order to meet our
revenue plan, revenue from our non-synthesis design creationphysical synthesis products, certain high level verification
products, physical design products, deep submicronour non-synthesis
products and professional services must grow faster than our overall revenue
growth target. Among the products that we expect to be the most important
contributors to revenue growth are our PrimeTime(R) timing analysis, VCS(TM)Physical Compiler physical synthesis, VCS
Verilog simulation Formality(R)
formal verification, Module Compiler(TM) datapath synthesis, Chip Architect
design planning, FlexRoute top-level routing, Physical Compiler and EPIC(R) deep
submicron analysis and verificationDesignWare IP library products. If revenue growth for
these products fails to meet our goals, it is unlikely that we will meet our
overall revenue growth target.
In order to sustain revenue growth over the long term, we will have to
introduce new products that are accepted by a broad range of customers and to
significantly expand our consulting services business. Product success is
difficult to predict. The introduction of new products and growth of a market
for such products cannot be assured. In the past we, like all companies, have
had products that have failed to meet our revenue expectations. Expanding
revenue from consulting services will require us to recruit, hire and train a
large number of skilled employees, and to implement management controls on
bidding and executing on consulting engagements. The consulting business is
significantly different from the software business, however, and increasing
consulting orders and revenue while maintaining an adequate level of profit can
be difficult. There can be no assurance that we will be successful in expanding
revenue from existing or new products at the desired rate or in expanding our
services business, and the failure to do so would have a material adverse effect
on our business, financial condition and results of operations.
Businesses We Acquire May Not Perform as Projected. We have acquired or
merged with a number of companies in recent years, including EPIC Design
Technology, Inc., Viewlogic, Systems Science, Inc., Everest, Gambit, Smartech,
Stanza, Apteq, TSG and Apteq,Leda, and as part of our efforts to increase revenue and
expand our product and services offerings we may acquire additional companies.
In addition to direct costs, acquisitions 27
28
pose a number of risks, including
potential dilution of earnings per share, delays and other problems ofin integrating the acquired
products and employees into our business, the failure to realize expected
synergies or cost savings, the failure of acquired products to achieve projected
sales, the drain on management time for acquisition-related activities, possible adverse
effects on customer buying patterns due to uncertainties resulting from an acquisition, and assumption of unknown liabilities. While
we attempt to review proposed acquisitions carefully and negotiate terms that
are favorable to Synopsys,us, there is no assurance that any individual acquisition will have the projecteda
positive effect on our performance.
Our Business Depends on the Semiconductor and Electronics Businesses. Our
business has benefited from the rapid worldwide growth of the semiconductor
industry.
Purchases of our products are largely dependent upon the commencement of new
design projects by semiconductor manufacturers and their customers, the number
of design engineers and the increasing complexity of designs. While a numberOur business has
benefited from the rapid worldwide growth of the semiconductor market
segments are growing at a healthy pace,industry, though
we do not directly benefit from increased volume alone. Several semiconductor
manufacturers and vendors of products incorporating semiconductors have recently
announced earnings shortfalls, and the overall outlook for the semiconductorelectronics industry, remainsand
the U.S. economy as a whole, is uncertain. Renewed growth in the semiconductor
industry will not necessarily lead to increases in purchases of Synopsys
products. In addition, demand may be affected
by mergers in the semiconductor and systems industries, which may reduce the
aggregate level of purchases of our products and services by the combined
companies. Slower growth in the semiconductor and systems industries,electronics industries; a
reduced number of design starts,starts; tightening of customers' operating budgets orbudgets;
continued consolidation among our customers mayor a shift toward FPGAs or other
types of semiconductors that can be designed with less-expensive EDA software;
all could have a material adverse effect on our business, financial condition
and results of operations.
Continued Stagnation of International Economies WillWould Adversely Affect Our
Performance. During fiscal 2000, 42% of our revenue was derived from outside of
North America, an increase from 34% in fiscal 1999. International revenue is
vulnerable to changes in foreign currency exchange rates and in regional or
worldwide economic or political conditions. Since the beginning of the Asian economic crisis, international revenue has
declined significantly as a percentage of overall revenue, as Asian customers
have deferred their investments in semiconductor facilities and technology. It will be difficult to sustain our
overall growth rate ifwithout continued growth in revenue from Japan, Asia remains stagnant or grows slowly. In particular:
-Pacific
and Europe. Revenue from Japan grew by almost 30% during fiscal 2000,
notwithstanding a weak economy, based in large part on the multiyear renewal of
licenses by a number of large customers. We do not expect similar growth in
revenue from Japan during fiscal 2001. If the Japanese economy remains weak,
revenue from Japan, and perhaps the rest of Asia, willcould be adversely affected.
In addition, the yen-dollar and euro-dollar exchange rate remainsrates remain subject to
unpredictable fluctuations. Weakness of the yen could adversely affect revenue
from Japan during future quarters. - Korea's ongoing economic weakness has had, and is likely to continue to
have a significant adverse effect on our orders and revenue from Korea.
In addition, two of our four largest Korean customers have merged, which
may result in a lower level of orders from the combined company than we
might have received if the two companies remained separate.
- Asian countries other than Japan and Korea also have
experienced economic and currency problems.problems, and in most cases they have not
fully recovered. If such conditions persist or worsen, orders and revenues from
the Asia Pacific region would be adversely affected.
26
27
Our Success Depends on Recruiting and Retaining Key Personnel. Our
success is dependent on technical and other contributions of key employees. We
participate in a dynamic industry, with significant start-up activity, and our
headquarters is in Silicon Valley, where skilled technical, sales and management
employees are in high demand. There are a limited number of qualified EDA
engineers, and the competition for such individuals is intense. Experience at
Synopsys is highly valued in the EDA industry, and our employees are recruited
aggressively by our competitors and by start-up companies, including those in
internet-related businesses.companies. Our salariescompensation
packages are competitive in the market, but under certain circumstances, start-up companies canmay be able to
offer more attractive stock option packages. As a result, we have experienced,
and may continue to experience, significant employee turnover. In addition, thereThere can be no
assurance that we can continue to recruit and retain key personnel or that it
can attract, assimilate or retain other highly qualifiedthe technical and
managerial personnel in the future.we need to run our business. Failure to successfully recruit and retain
such personneldo so could have a
material adverse effect on our business, financial condition and results of
operations.
Dependence on Proprietary Technology. Our success is dependent, in part,
upon our proprietary technology and other intellectual property rights. There
can be no assurance that our competitors will not independently develop or
acquire similar techniques or gain access to our proprietary technology or that
we can protect our rights to our technology. We rely
on confidentiality
agreementscontractual arrangements with collaborators,customers, employees 28
29
vendors and consultantsothers, and
intellectual property laws, to protect our proprietary technology. There can be
no assurance that these agreements will not be breached, that we would have
adequate remedies for any breach or that our trade secrets will not otherwise
become known or be independently developed by competitors. Moreover, effective
intellectual property protection may be unavailable or limited in certain
foreign countries. Failure to obtain or maintain appropriate patent, copyright
or trade secret protection, for any reason, could have a material adverse effect
on our business, financial condition and results of operations. In addition,
there can be no assurance that infringement claims will not be asserted against
us; and any such claims could require us to enter into royalty arrangements or
result in costly and time-consuming litigation.
Fixed Operating Expenses. Our operating expenses are based in part on
our expectations of future revenue, and expense levels are generally committed
in advance of revenue. We expectSince only a small portion of our expenses varies with
revenue, a shortfall in revenue translates directly into a reduction in net
income. For fiscal 2001 our target for overall expense growth over fiscal 2000
is 2.5% to continue to increase operating expenses in
order to generate and support continued3.5%, substantially below the rate of growth in revenue.recent years, and we
have implemented expense controls to achieve this target. If we wereare unsuccessful
in generating suchanticipated revenue, or unsuccessful at controlling the growth of
expenses, however, our business, financial condition and results of operations
could be materially adversely affected. Net income in a
given quarter or fiscal year may be disproportionately affected by a reduction
in revenue growth because only a small portion of our expenses varies with
revenue.
Anti-Takeover Provisions. We have adopted a number of provisions that
could have anti-takeover effects. The Board of Directors has adopted a Preferred
Shares Rights Plan, commonly referred to as a "poison pill." In addition, the
Board of Directors has the authority, without further action by its
stockholders, to issue additional shares of Common Stock and to fix the rights
and preferences of, and to issue authorized but undesignated shares of Preferred
Stock. These and other provisions of Synopsys' Restated Certificate of
Incorporation and Bylaws and the Delaware General Corporation Law may have the
effect of deterring hostile takeovers or delaying or preventing changes in
control or management of Synopsys, including transactions in which the
shareholders of the Company might otherwise receive a premium for their shares
over then current market prices.
Year 2000 Problems.Change in Financial Accounting Standards. We prepare our financial
statements in conformity with generally accepted accounting principles (GAAP).
GAAP are uncertain assubject to interpretation by the Year 2000 readinessAmerican Institute of our
customers,Certified Public
Accountants (AICPA), the SEC and if onevarious bodies appointed by these organizations
to interpret existing rules and create new accounting policies. In particular, a
task force of the Accounting Standards Executive Committee, a subgroup of the
AICPA, meets on a quarterly basis to review various issues arising under the
existing software revenue recognition rules, and issues interpretations of these
rules. Additional Interpretations issued by the task force may have an adverse
effect on how we report revenue or more important customers were to experience Year
2000-related problems that interfered with their purchases of Synopsys products,
our revenues could be reduced, perhaps materially. In addition, if our plan to
address failures caused by Year 2000 problems, including disruptions of our
power supply, increased hacker or computer virus activity or internal systems
failures not remediated by our Year 2000 efforts, proved unsuccessful,on the way we conduct our business financial condition and results of operations could be materially and
adversely affected.
EUROPEAN MONETARY UNITin the
future.
European Monetary Unit. The Company's sales to European customers are
primarily U.S. dollar based. However, the Company does recognize the emergence of a new monetary unit and the
potential importance of such a new monetary unit to its customers residing in
the European union. The Company's information systems are capable of functioning
in multiple currencies. The Company has already started to makemade system changes to make all
infrastructures capable of operations in the European Monetary Unit. The Company
doeshas not expect to incur significant expenses for these system
changes. The Company does not expectexperienced any disruption in operations due to the European Monetary
Unit implementation.
ITEM 7A. QUANTITATIVE AND QUALITATIVE DISCLOSURE ABOUT MARKET RISKRISK.
Information relating to quantitative and qualitative disclosure about
market risk is set forth in Synopsys' 19992000 Annual Report on Form 10-K under the
captions "Interest Rate Risk" and "Foreign Currency Risk" in Management's
Discussion and Analysis of Financial Condition and Results of Operations, and
"Foreign Exchange Hedging" in Note 1 of theSynopsys' Notes to Consolidated
Financial Statements.
2927
3028
ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA
REPORT OF KPMG LLP, INDEPENDENT AUDITORS
To The Board of Directors and Shareholders of Synopsys, Inc.:
We have audited the accompanying consolidated balance sheets of
Synopsys, Inc. and subsidiaries as of October 31, 2000 and 1999 and September
30, 1999, and 1998, and the related consolidated statements of income,operations, stockholders'
equity and comprehensive income (loss) and cash flows for the year ended October
31, 2000, the one-month period ended October 31, 1999 and each of the years in
the three-yeartwo-year period ended September 30, 1999. These consolidated financial
statements are the responsibility of the Company's management. Our
responsibility is to express an opinion on these consolidated financial
statements based on our audits.
We conducted our audits in accordance with auditing standards generally
accepted auditing
standards.in the United States of America. Those standards require that we plan
and perform the audit to obtain reasonable assurance about whether the financial
statements are free of material misstatement. An audit includes examining, on a
test basis, evidence supporting the amounts and disclosures in the financial
statements. An audit also includes assessing the accounting principles used and
significant estimates made by management, as well as evaluating the overall
financial statement presentation. We believe that our audits provide a
reasonable basis for our opinion.
In our opinion, based on our audits, the consolidated financial statements referred to above
present fairly, in all material respects, the financial position of Synopsys,
Inc. and subsidiaries as of October 31, 2000 and 1999, and September 30, 1999, and 1998,
and the results of their operations and their cash flows for the year ended
October 31, 2000, the one-month period ended October 31, 1999 and each of the
years in the three-yeartwo-year period ended September 30, 1999 in conformity with
accounting principles generally accepted accounting principles.in the United States of America.
/s/ KPMG LLP
Mountain View, California
October 23, 1999
30November 17, 2000, except as to Note 10,
which is as of January 4, 2001
28
31
ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA29
SYNOPSYS, INC.
CONSOLIDATED BALANCE SHEETS
(in thousands, except share data)
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
-----------------------2000 1999 1998
---------- ---------1999
----------- ----------- -------------
ASSETS
Current assets:
Cash and cash equivalents.................................equivalents $ 153,120 $ 309,394 $ 285,314
$ 164,548
Short-term investments....................................investments 282,519 399,995 418,871
440,082
---------- -------------------- ----------- -----------
Cash, cash equivalents and short-term investments........................investments 435,639 709,389 704,185
604,630----------- ----------- -----------
Accounts receivable, net of allowances of
$9,539, $10,563 and $10,523, and $13,210, respectively......................respectively 146,449 130,253 155,885 126,336
Prepaid expenses, deferred taxes and other................other 102,433 66,814 54,663
42,461
---------- -------------------- ----------- -----------
Total current assets...................................assets 684,521 906,456 914,733
773,427
---------- -------------------- ----------- -----------
Property and equipment, net.................................net 157,243 135,118 126,204
99,998
Long-term investments.......................................investments 126,741 57,651 53,277 38,265
Intangible assets, net......................................net 51,776 56,240 57,393
20,230
Other assets................................................assets 30,712 22,818 22,311
19,713
---------- -------------------- ----------- -----------
Total assets...................................... $1,173,918assets $ 951,633
========== =========1,050,993 $ 1,178,283 $ 1,173,918
=========== =========== ===========
LIABILITIES AND STOCKHOLDERS' EQUITY
Current liabilities:
Accounts payable..........................................payable and accrued liabilities $ 8,814139,290 $ 15,058
Accrued liabilities....................................... 109,781 102,35498,976 $ 118,595
Current portion of long-term debt.........................debt 6,416 8,658 8,610 7,783
Accrued income taxes......................................taxes 56,304 50,146 50,036
50,313
Deferred revenue..........................................revenue 150,654 126,758 110,285
93,160
---------- -------------------- ----------- -----------
Total current liabilities..............................liabilities 352,664 284,538 287,526
268,668
---------- -------------------- ----------- -----------
Long-term debt..............................................debt 564 11,304 11,642
13,138
Deferred compensation.......................................compensation 14,936 9,844 9,154 4,886
Commitments and contingencies
Stockholders' equity:
Preferred stock, $.01 par value; 2,000,000 shares
authorized; no shares outstanding..................................outstanding -- -- --
Common stock, $.01 par value; 200,000,000 shares
authorized; 70,260,00062,877,000, 70,750,000 and
67,925,00070,260,000 shares outstanding, respectively..............................respectively 629 708 703 679
Additional paid-in capital................................capital 558,716 542,052 530,528
423,975
Retained earnings.........................................earnings 405,419 349,192 371,395 240,465
Treasury stock, at cost 768,000 and
318,000 shares, respectively...........................(329,493) (28,589) (43,657) (11,184)
Accumulated other comprehensive income....................income 47,558 9,234 6,627
11,006
---------- -------------------- ----------- -----------
Total stockholders' equity.............................equity 682,829 872,597 865,596
664,941
---------- -------------------- ----------- -----------
Total liabilities and stockholders' equity........ $1,173,918equity $ 951,633
========== =========1,050,993 $ 1,178,283 $ 1,173,918
=========== =========== ===========
See accompanying notes to consolidated financial statements.
3129
3230
SYNOPSYS, INC.
CONSOLIDATED STATEMENTS OF INCOMEOPERATIONS
(in thousands, except per share data)
YEAR ENDED ONE MONTH ENDED
OCTOBER 31, OCTOBER 31, YEARS ENDED SEPTEMBER 30,
------------------------------------------- --------------- -------------------------
2000 1999 1999 1998
1997----------- --------------- -------- -------- -----------------
Revenue:
Product....................................................Product $442,453 $ 4,150 $505,847 $430,979
$408,256
Service..................................................Service 341,325 19,032 300,251 286,961
238,700-------- -------- -------- --------
Total revenue....................................revenue 783,778 23,182 806,098 717,940
646,956-------- -------- -------- --------
Cost of revenue:
Product..................................................Product 42,257 3,364 37,888 36,371
36,777
Service..................................................Service 82,217 4,016 68,876 57,396
50,108-------- -------- -------- --------
Total cost of revenue............................revenue 124,474 7,380 106,764 93,767
86,885-------- -------- -------- --------
Gross margin...............................................margin 659,304 15,802 699,334 624,173
560,071-------- -------- -------- --------
Operating expenses:
Research and development.................................development 189,280 17,156 167,085 156,663
146,849
Sales and marketing......................................marketing 288,762 19,023 241,639 245,376
240,606
General and administrative...............................administrative 59,248 5,690 47,132 47,179 47,284
Amortization of intangible assets........................assets 15,129 1,153 7,907 -- --
Merger-related and other costs...........................costs -- -- -- 51,009 11,400
In-process research and development......................development 1,750 -- 21,176 33,069
5,500-------- -------- -------- --------
Total operating expenses.........................expenses 554,169 43,022 484,939 533,296
451,639-------- -------- -------- --------
Operating income...........................................income (loss) 105,135 (27,220) 214,395 90,877
108,432
Other income, net..........................................net 40,803 1,740 37,016 25,984
24,361-------- -------- -------- --------
Income (loss) before provision (benefit) for
income taxes and extraordinary items..................................items 145,938 (25,480) 251,411 116,861
132,793
Provision (benefit) for income taxes.................................taxes 48,160 (9,937) 90,049 55,819
51,043-------- -------- -------- --------
Income (loss) before extraordinary items..........................items 97,778 (15,543) 161,362 61,042 81,750
Extraordinary items -- sale of business unit
and gain on extinguishment of debt,
net of income tax expense.....expense -- -- -- 28,404
---------- -------- -------- --------
Net income.................................................income (loss) $ 97,778 $(15,543) $161,362 $ 89,446
$ 81,750======== ======== ======== ========
Basic earnings per share:
Income (loss) before extraordinary items........................items $ 1.43 $ (0.22) $ 2.30 $ 0.92
$ 1.30
Extraordinary items......................................items -- 0.43 -- -- 0.42
-------- -------- -------- --------
Net income...............................................income (loss) $ 1.43 $ (0.22) $ 2.30 $ 1.34
$ 1.30======== ======== ======== ========
Weighted average common shares...........................shares 68,510 70,400 70,118 66,568
62,852======== ======== ======== ========
Diluted earnings per share:
Income (loss) before extraordinary items........................items $ 1.38 $ (0.22) $ 2.20 $ 0.88
$ 1.24
Extraordinary items......................................items -- -- -- 0.41
---------- -------- -------- --------
Net income...............................................income (loss) $ 1.38 $ (0.22) $ 2.20 $ 1.29
$ 1.24======== ======== ======== ========
Weighted average common shares
and equivalents.......................................potentially dilutive common shares 70,998 70,400 73,422 69,524
65,925======== ======== ======== ========
See accompanying notes to consolidated financial statements.
3230
3331
SYNOPSYS, INC.
CONSOLIDATED STATEMENTS OF STOCKHOLDERS' EQUITY AND COMPREHENSIVE INCOME (LOSS)
(in thousands)
COMMON STOCK ADDITIONAL
DEFERRED
SHARES PAID-IN RETAINED STOCK COMPREHENSIVE
OUTSTANDING AMOUNT CAPITAL EARNINGS
COMPENSATION INCOME
------------ ----------------- --------- ---------- -------- ------------ ----------------------
Balance at October 1, 1996............. 61,570 $616 $263,141September 30, 1997 64,750 $ 75,550 $(110) --647 $ 335,215 $ 151,428
Comprehensive Income:
Net income...........................income -- -- -- 81,750 -- $ 81,750
Other comprehensive income, net of
tax:
Unrealized gain on investments....... -- -- -- -- -- 9,183
Reclassification adjustment on
unrealized gains on investments.... -- -- -- -- -- (4,185)
Foreign currency translation
adjustment......................... -- -- -- -- -- (1,193)
--------
Other comprehensive income........... -- -- -- -- -- 3,805
--------
Comprehensive income................... -- -- -- -- -- $ 85,555
========
Acquisition of treasury stock.......... (440) (5) -- -- -- --
Issuance of common stock............... 906 9 1,129 -- -- --
Stock issued under stock option and
stock purchase plans................. 2,714 27 40,921 (5,872) -- --
Tax benefits associated with exercise
of stock options..................... -- -- 30,024 -- -- --
Amortization of deferred stock
compensation......................... -- -- -- -- 110 --
------ ---- -------- -------- -----
Balance at September 30, 1997.......... 64,750 647 335,215 151,428 -- --
Comprehensive Income:
Net income........................... -- -- -- 89,446 -- $ 89,446
Other comprehensive income, net of
tax:
Unrealized gain on investments....... -- -- -- -- -- 3,983
Reclassification adjustment on
unrealized gains on investments.... -- -- -- -- -- (9,018)
Foreign currency translation
adjustment......................... -- -- -- -- -- 886
--------
Other comprehensive income (loss).... -- -- -- -- -- (4,149)
--------
Comprehensive income................... -- -- -- -- -- $ 85,297
========
Acquisition of treasury stock.......... (353) (4) -- -- -- --
Issuance of common stock............... 485 5 5,903 -- -- --
Stock options assumed in connection
with acquisition..................... -- -- 7,636 -- -- --
Stock issued under stock option and
stock purchase plans................. 3,043 31 61,454 (409) -- --
Tax benefits associated with exercise
of stock options..................... -- -- 13,767 -- -- --
------ ---- -------- -------- -----
Balance at September 30, 1998.......... 67,925 679 423,975 240,465 -- --
Comprehensive Income:
Net income........................... -- -- -- 161,362 -- $161,362
Other comprehensive income, net of
tax:
Unrealized gain on investments....... -- -- -- -- -- 5,506
Reclassification adjustment on
unrealized gains on investment..... -- -- -- -- -- (9,539)
Foreign currency translation
adjustment......................... -- -- -- -- -- (346)
--------
Other comprehensive income (loss).... -- -- -- -- -- (4,379)
--------
Comprehensive income................... -- -- -- -- -- $156,983
========
Acquisition of treasury stock.......... (1,680) (17) 17 -- -- --
Stock options assumed in connection
with acquisition..................... 49 1 6,451 -- -- --
Stock issued under stock option and
stock purchase plans................. 3,966 40 70,236 (30,432) -- --
Tax benefits associated with exercise
of stock options..................... -- -- 29,849 -- -- --
------ ---- -------- -------- -----
Balance at September 30, 1999.......... 70,260 $703 $530,528 $371,395 $ -- --
====== ==== ======== ======== =====
ACCUMULATED
OTHER
COMPREHENSIVE TREASURY
INCOME (LOSS) STOCK TOTAL
------------- -------- --------
Balance at October 1, 1996............. $11,350 $ -- $350,547
Comprehensive Income:
Net income........................... -- -- 81,750
Other comprehensive income, net of
tax:
Unrealized gain on investments....... -- -- 9,183
Reclassification adjustment on
unrealized gains on investments.... -- -- (4,185)
Foreign currency translation
adjustment......................... -- -- (1,193)
Other comprehensive income........... 3,805 -- --
Comprehensive income................... -- -- --
Acquisition of treasury stock.......... -- (9,489) (9,494)
Issuance of common stock............... -- -- 1,138
Stock issued under stock option and
stock purchase plans................. -- 9,489 44,565
Tax benefits associated with exercise
of stock options..................... -- -- 30,024
Amortization of deferred stock
compensation......................... -- -- 110
------- -------- --------
Balance at September 30, 1997.......... 15,155 -- 502,445
Comprehensive Income:
Net income........................... -- -- 89,446
Other comprehensive income, net of tax:
Unrealized gain on investments.......investments -- -- 3,983-- --
Reclassification adjustment
on unrealized gains on investments....investments -- -- (9,018)-- --
Foreign currency translation adjustment.........................adjustment -- -- 886-- --
Other comprehensive income (loss).... (4,149) -- -- -- --
Comprehensive income...................income -- -- -- --
Acquisition of treasury stock..........stock (353) (4) -- (12,403) (12,407)--
Issuance of common stock...............stock 485 5 5,903 -- -- 5,908
Stock options assumed in
connection with acquisition.....................acquisition -- -- 7,636 --
Stock issued under stock option
and stock purchase plans................. -- 1,219 62,295plans 3,043 31 61,454 (409)
Tax benefits associated with
exercise of stock options.....................options -- -- 13,767 ------- -------- ----------
-----------------------------------------------------
Balance at September 30, 1998.......... 11,006 (11,184) 664,9411998 67,925 679 423,975 240,465
Comprehensive Income:
Net income...........................income -- -- -- 161,362
Other comprehensive income, net of tax:
Unrealized gain on investments.......investments -- -- -- --
Reclassification adjustment
on unrealized gains on investments -- -- -- --
Foreign currency translation adjustment -- -- -- --
Other comprehensive (loss) -- -- -- --
Comprehensive income -- -- -- --
Acquisition of treasury stock (1,680) (17) 17 --
Stock options assumed in
connection with acquisition 49 1 6,451 --
Stock issued under stock option
and stock purchase plans 3,966 40 70,236 (30,432)
Tax benefits associated with
exercise of stock options -- -- 29,849 --
-----------------------------------------------------
Balance at September 30, 1999 70,260 703 530,528 371,395
Comprehensive Income:
Net (loss) -- -- -- (15,543)
Other comprehensive income, net of tax:
Unrealized gain on investments -- -- -- --
Foreign currency translation adjustment -- -- -- --
Other comprehensive income -- -- -- --
Comprehensive (loss) -- -- -- --
Stock issued under stock option
and stock purchase plans 490 5 8,906 (6,660)
Tax benefits associated with
exercise of stock options -- -- 2,618 --
-----------------------------------------------------
Balance at October 31, 1999 70,750 708 542,052 349,192
Comprehensive Income:
Net income -- -- -- 97,778
Other comprehensive income, net of tax:
Unrealized gain on investments -- -- -- --
Reclassification adjustment
on unrealized gains on investments -- -- -- --
Foreign currency translation adjustment -- -- -- --
Other comprehensive income -- -- -- --
Comprehensive income -- -- -- --
Acquisition of treasury stock (9,932) (99) 99 --
Stock options assumed in
connection with acquisition -- -- 1,187 --
Stock issued under stock option
and stock purchase plans 2,059 20 4,514 (41,551)
Tax benefits associated with
exercise of stock options -- -- 10,864 --
-----------------------------------------------------
Balance at October 31, 2000 62,877 $ 629 $ 558,716 $ 405,419
====== ========= ========= =========
31
32
ACCUMULATED
OTHER
COMPREHENSIVE COMPREHENSIVE TREASURY
INCOME/(LOSS) INCOME STOCK TOTAL
------------- ------------- --------- ---------
Balance at September 30, 1997 $ 15,155 $ -- $ 502,445
Comprehensive Income:
Net income $ 89,446 -- -- 89,446
Other comprehensive income, net of tax:
Unrealized gain on investments 3,983 -- -- 3,983
Reclassification adjustment
on unrealized gains on investments (9,018) -- -- (9,018)
Foreign currency translation adjustment 886 -- -- 886
---------
Other comprehensive (loss) (4,149) (4,149) -- --
---------
Comprehensive income $ 85,297 -- -- --
=========
Acquisition of treasury stock -- (12,403) (12,407)
Issuance of common stock -- -- 5,908
Stock options assumed in
connection with acquisition -- -- 7,636
Stock issued under stock option
and stock purchase plans -- 1,219 62,295
Tax benefits associated with
exercise of stock options -- -- 13,767
----------------------------------------------
Balance at September 30, 1998 11,006 (11,184) 664,941
Comprehensive Income:
Net income $ 161,362 -- -- 161,362
Other comprehensive income, net of tax:
Unrealized gain on investments 5,506 -- -- 5,506
Reclassification adjustment
on unrealized gains on investment.....investments (9,539) -- -- (9,539)
Foreign currency translation adjustment.........................adjustment (346) -- -- (346)
---------
Other comprehensive income (loss).... (4,379) (4,379) -- --
---------
Comprehensive income...................income $ 156,983 -- -- --
---------
Acquisition of treasury stock..........stock -- (95,355) (95,355)
Stock options assumed in
connection with acquisition.....................acquisition -- -- 6,452
Stock issued under stock option
and stock purchase plans.................plans -- 62,882 102,726
Tax benefits associated with
exercise of stock options.....................options -- -- 29,849
------- -------- -------------------------------------------------------
Balance at September 30, 1999..........1999 6,627 (43,657) 865,596
Comprehensive Income:
Net (loss) $ 6,627 $(43,657) $865,596
======= ======== ========(15,543) -- -- (15,543)
Other comprehensive income, net of tax:
Unrealized gain on investments 2,497 -- -- 2,497
Foreign currency translation adjustment 110 -- -- 110
---------
Other comprehensive income 2,607 2,607 -- --
---------
Comprehensive (loss) $ (12,936) 1
=========
Stock issued under stock option
and stock purchase plans -- 15,068 17,319
Tax benefits associated with
exercise of stock options -- -- 2,618
-----------------------------------------------
Balance at October 31, 1999 9,234 (28,589) 872,597
Comprehensive Income:
Net income $ 97,778 -- -- 97,778
Other comprehensive income, net of tax:
Unrealized gain on investments 50,689 -- -- 50,689
Reclassification adjustment
on unrealized gains on investments (8,934) -- -- (8,934)
Foreign currency translation adjustment (3,431) -- -- (3,431)
---------
Other comprehensive income 38,324 38,324 -- --
---------
Comprehensive income $ 136,102
---------
Acquisition of treasury stock -- (397,466) (397,466)
Stock options assumed in
connection with acquisition -- -- 1,187
Stock issued under stock option
and stock purchase plans -- 96,562 59,545
Tax benefits associated with
exercise of stock options -- -- 10,864
-----------------------------------------------
Balance at October 31, 2000 $ 47,558 $(329,493) $ 682,829
========= ========= =========
See accompanying notes to the consolidated financial statements.statements
33 34
SYNOPSYS, INC.
CONSOLIDATED STATEMENTS OF CASH FLOWS
(in thousands)
YEAR ENDED ONE MONTH ENDED YEARS ENDED
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
--------------------------------------------- --------------- -----------------------------
2000 1999 1999 1998
1997
-------- --------- -------------------- --------------- ----------- -----------
Cash flows from operating activities:
CASH FLOWS FROM OPERATING ACTIVITIES:
Net income.................................................. $161,362income (loss) $ 97,778 $ (15,543) $ 161,362 $ 89,446
$ 81,750
Adjustments to reconcile net income to net cash
provided by operating activities:ADJUSTMENTS TO RECONCILE NET INCOME (LOSS) TO
NET CASH PROVIDED BY OPERATING ACTIVITIES:
Software sold in exchange for minority investment.......investment -- -- 500 -- --
Depreciation and amortization...........................amortization 63,770 4,907 52,025 44,152 39,826
Tax benefit associated with stock options...............options 10,864 2,618 29,849 13,767 30,024
Provision for doubtful accounts and sales returns....... (2,687)returns 3,528 -- 2,007 8,431 2,574
Interest accretion on notes payable.....................payable 792 66 842 510
526
Deferred taxes..........................................taxes (37,685) (12,555) (5,111) (6,617) (20,811)
Gain on sale of long-term investments...................investments (11,455) -- (19,578) (9,930) (15,856)
Non-cash merger-related and other costs.................costs -- -- -- 8,367 3,084
In-process research and development.....................development 1,750 -- 21,176 33,069
5,500
Extraordinary gains.....................................gains -- -- -- (28,404) --
Net changes in operating assets and liabilities:
Accounts receivable................................... (26,652)receivable (18,771) 25,632 (31,346) (25,754) (25,490)
Prepaid expenses and other current assets.............assets (24,111) (1,260) (3,232) (699)
(3,134)
IntangibleOther assets net................................ 416 (5,639) (2,758)
Other assets..........................................(8,787) (668) (2,870) (2,505)
(3,191)
Accounts payable...................................... (6,289) (5,665) 5,535
Accrued liabilities................................... 2,715 15,226 4,810payable and accrued liabilities 39,180 (19,619) (3,574) 9,561
Accrued income taxes..................................taxes 5,980 110 (277) 1,147
16,424
Deferred revenue......................................revenue 23,190 16,473 16,854 9,377
7,020
Deferred compensation.................................compensation 5,092 690 4,268 1,681
3,205
-------- --------- -------------------- ----------- ----------- -----------
Net cash provided by operating activities.......... 223,311 139,960 129,038
-------- --------- ---------
Cash flows from investing activities:activities 151,115 851 222,895 145,599
----------- ----------- ----------- -----------
CASH FLOWS FROM INVESTING ACTIVITIES:
Proceeds from sales of long-term investments..............investments 24,336 -- 21,752 15,158 22,503
Proceeds from sale of business unit.......................unit -- -- -- 51,900
5,000
Purchases of long-term investments........................ (27,589) (1,998) (25,342)
PurchasesProceeds from sales and maturities of
short-term investments........ 21,211 (127,849) (52,886)investments 2,782,613 138,212 5,101,336 4,079,343
Purchases of short-term investments (2,665,137) (119,549) (5,080,125) (4,207,192)
Purchases of long-term investments (13,998) -- (27,589) (1,998)
Purchases of property and equipment.......................equipment (68,500) (12,507) (65,816) (58,106) (61,322)
Purchase of technology.................................... -- -- (335)
Acquisitions (net of cash acquired)....................... (14,474) -- (46,493) (30,354)
Intangible assets, net 3,697 -- -------- --------- ---------1,289 (3,546)
Capitalization of software development costs (1,000) -- (873) (2,093)
----------- ----------- ----------- -----------
Net cash used inprovided by (used in) investing activities.............. (96,935) (151,249) (112,382)
-------- --------- ---------
Cash flows from financing activities:activities 47,537 6,156 (96,519) (156,888)
----------- ----------- ----------- -----------
CASH FLOWS FROM FINANCING ACTIVITIES:
Proceeds from sale of common stock net...................59,545 17,319 102,726 68,203
45,703Proceeds from issuance of long-term debt 727 (356) -- --
Purchases of treasury stock...............................stock (397,466) -- (95,355) (12,407) (9,494)
Principal payments on debt obligations....................obligations (14,299) -- (12,631) (7,627)
(11,568)
-------- --------- ---------=========== =========== =========== ===========
Net cash (used)(used in) provided by financing activities...activities (351,493) 16,963 (5,260) 48,169
24,641
-------- --------- -------------------- ----------- ----------- -----------
Effect of exchange rate changes on cash.....................cash (3,433) 110 (350) 361
(1,090)
-------- --------- -------------------- ----------- ----------- -----------
Net increaseincrease/decrease in cash and cash equivalents...................equivalents (156,274) 24,080 120,766 37,241 40,207
Cash and cash equivalents, beginning of year................year/period 309,394 285,314 164,548 127,307
87,100
-------- --------- -------------------- ----------- ----------- -----------
Cash and cash equivalents, end of year...................... $285,314year/period $ 153,120 $ 309,394 $ 285,314 $ 164,548
$ 127,307
======== ========= =========
Supplemental disclosure of cash flow information:=========== =========== =========== ===========
SUPPLEMENTAL DISCLOSURE OF CASH FLOW INFORMATION:
Cash paid during the yearyear/period for:
Interest................................................Interest $ 646 $ 76 $ 944 $ 770
$ 769
Income taxes............................................ $taxes 91,927 108 63,141 $ 46,206 $ 25,215
Non-cash transactions:
Notes payable issued in connection with acquisition.....acquisition $ -- $ -- $ 11,120 $ 12,000
$ --Changes in unrealized gains (losses)
on long-term investments 67,974 4,375 (5,432) (7,858)
See accompanying notes to consolidated financial statements.statements
32
34 35
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS
NOTE 1. SUMMARY OF SIGNIFICANT ACCOUNTING POLICIES
Nature of Operations. Synopsys, Inc. ("Synopsys" or the "Company") is a
leading supplier of EDA software to the global electronics industry. The Company
develops, markets, and supports a wide range of IC design products that are used
by designers of advanced ICs, including system-on-a-chip ICs, and the electronic
systems (such as computers, cell phones, and internet routers) that use such
ICs. The Company also provides consulting services to help its customers improve
their IC design processes and, where requested, to assist them with their IC
designs.
Change in Fiscal Year End. The Company has a fiscal year that ends on the Saturday
nearest September 30.October 31. Fiscal 1999 and 19972000 were 52-week years while fiscal 1998
was a 53-week year. Fiscal year 2001 will be a 53-week year. For presentation
purposes, the consolidated financial statements and notes refer to the calendar
month end. On July 15,
1999, the Board of Directors determined that Synopsys' fiscal 2000 and
subsequent fiscal years shall end on the Saturday nearest to October 31. As a
result, fiscal 2000 shall commence on October 31, 1999 and end on October 28,
2000. The period from October 3, 1999 through October 30, 1999 shall be a
transition period. Information for the transition period will be filed with
Synopsys' quarterly report on Form 10-Q for the first quarter of fiscal 2000.
Principles of Consolidation. The consolidated financial statements
include the accounts of the Company and all of its subsidiaries. All significant
intercompany accounts and transactions have been eliminated.
Use of Estimates. The preparation of financial statements in conformity
with generally accepted accounting principles requires management to make
estimates and assumptions that affect the recorded amounts of revenues and
expenses, assets and liabilities, disclosure of assets and liabilities at the
date of the financial statements and the recorded amounts of expenses during the reporting
period.statements. A change in the facts and circumstances
surrounding these estimates could result in a change to the estimates and impact
future operating results.
Cash Equivalents, Fair Values of Financial Instruments and Concentration
of Credit Risk. Financial instruments which potentially subject the Company to
concentrations of credit risk consist principally of cash equivalents,
investments and trade receivables.
All of the Company's cash equivalents and investments are classified as
available-for-sale and unrealized gains and losses (determined as the difference
between the recorded amount of the investment and its fair value) are reported
in stockholders' equity as a component of accumulated other comprehensive
income, at fair value, net of tax, if any. The fair value of investments is based on quoted
market prices. Realized gains and losses are included in other income, net. Cash
equivalents have remaining maturities of three months or less when acquired. The
Company has cash equivalents and investments with various high quality
institutions and, by policy, limits the amount of credit exposure to any one
institution.
The Company sells its products worldwide primarily to customers in the
semiconductor industry. The Company performs on-going credit evaluations of its
customers' financial condition and generally does not require collateral. The
Company maintains reserves for potential credit losses, and such losses have
been within management's expectations and have not been material in any year. As
of October 31, 2000, October 31, 1999, September 30, 1999 and September 30,
1998, the Company had sold approximately $5.3 million, $21.8 million, $22.8
million and $12.6 million, respectively, of its accounts receivable to a
financial institution.
The fair value of the Company's cash, accounts receivable, long-term
investments, put/call and forward contracts relating to certain of the Company's
equity securities, accounts payable, long-term debt and foreign currency
contracts, approximates the carrying amount, which is the amount for which the
instrument could be exchanged in a current transaction between willing parties.
Foreign Currency Translation. The functional currency of each of the
Company's international subsidiaries is the foreign subsidiary's local currency.
Assets and liabilities of the Company's international operations are translated
into U.S. dollars at exchange rates in effect at the balance sheet date. Income
and 35
36
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
expense items are translated at average exchange rates for the period.
Accumulated net translation adjustments are reported in stockholders' equity as
33
35
a component of accumulated other comprehensive income. The associated tax
benefit for cumulative translation adjustment was $0.2$2.2 million and $0.7$0.2 million
in fiscal 19992000 and 1997,1999, and the associated tax expense was $0.5 million in
fiscal 1998, respectively.1998. For the one-month ended October 31, 1999, the tax benefit for the
cumulative translation was not material. Foreign exchange transaction gains and
losses were not material for all periods presented and are included in the
results of operations.
Synopsys' international business is an important contributor to the
Company's revenue and net profits. However, the majority of Synopsys'
international sales are denominated in the U.S. dollar, and an increase in the
value of the U.S. dollar relative to foreign currencies could make products sold
internationally less competitive. The operating expenses of Synopsys' overseas
offices are paid in local currencies and are subject to the effect of
fluctuations in foreign currency exchange rates as compared to their respective
local currency. The effect of foreign exchange rate fluctuations did not
significantly impact the Company's operating results. Financial exposure may
nonetheless result, primarily from the timing of transactions and the movement
of foreign exchange rates.
Foreign Exchange Hedging.Contracts. The Company operates internationally and
thus is exposed to potentially adverse movements in foreign currency rate
changes. In fiscal 1999,2000, the Company entered into foreign exchange forward
contracts to reduce its exposure to foreign currency rate changes on
intercompany foreignnon-functional currency denominated balance sheet positions. The objective of
these contracts is to neutralize the impact of foreign currency exchange rate
movements on the Company'sCompany' operating results.
These contracts require the Company to exchange currencies at rates
agreed upon at the inception of the contracts. The hedge contracts reduce the
exposure to fluctuations in exchange rate movements because the gains and losses
associated with foreign currency balances and transactions are generally offset
with the gains and losses of the hedge contracts. Because the impact of
movements in currency exchange rates on forward contracts offsets the related
impact on the underlying items being hedged, these financial instruments help
alleviate the risk that might otherwise result from changes in currency exchange
rate fluctuations.
The Company's accounting policies for these instruments are based on the
Company's designation of such instruments as hedging transactions. The criteria
the Company uses for designating an instrument as a hedge includes the
instrument's effectiveness in risk reduction. Gains and losses on these
contracts, all of which are designated and effective as hedges of existing
transactions, are recognized in operations in the period in which gains and
losses on the underlying transactions occur.rates.
The Company does not use derivative financial instruments for
speculative or trading purposes. In the event of termination or extinguishment
of a contract, associated gains and losses would be recognized in operations in
the period in which the contract was terminated or extinguished.
These contracts contain credit risk in that the counterparty may be
unable to meet the terms of the agreements. The Company has limited these
agreements to major financial institutions to reduce such credit risk.
Furthermore, the Company monitors the potential risk of loss with any one
financial institution and does not expect any material loss as a result of
default by the counterparties.
Revenue Recognition. The Company recognizes revenue in accordance with SOP
97-2, Software Revenue Recognition, as amended by SOP 98-4. SOP 97-2 generally
requires revenue earned on software arrangements involving multiple elements to
be allocated to each element based on the relative fair values of the elements.
The revenue allocated to software products, including time-based software
licenses, generally is recognized upon delivery of the products. The revenue
allocated to postcontract customer support (PCS) is recognized ratably over the
term of the support and revenue allocated to service elements is recognized as
the services are performed.
In accordance with SOP 97-2, the Company has analyzed all of the elements
included in its multiple-element arrangements and determined that the Company
has sufficient evidence of fair value to
36
37
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
allocate revenue to the license and PCS components of certain of its time-based
product licenses. Accordingly, the portion of the time-based license fee
allocated to the license component is recognized upon delivery of the software
product and the portion of the fee allocated to PCS is recognized ratably over
the term of the support. Software subscriptions continue to be recognized on a
ratable basis.
Revenue consists of fees for licenses and
subscriptions of the Company'sCompany' software products, sales of hardware system
products, maintenance and support, customer training, and consulting. Cost of
product revenue includes cost of production personnel, product packaging,
documentation, amortization of capitalized software development costs and
purchased technology, and costs of the Company's systems products. Cost of
service revenue includes personnel and the related costs associated with
providing training and consulting.
The Company recognizes revenue in accordance with SOP 97-2, Software
Revenue Recognition, as amended by SOP 98-9. SOP 97-2 generally requires revenue
earned on software arrangements involving multiple elements to be allocated to
each element based on the relative fair values of the elements. The revenue
allocated to software products, including time-based software licenses, will be
recognized upon delivery of the products, ratably over the term of the license
or as payments are received, depending upon the structure and terms of the
arrangement. The revenue allocated to postcontract customer support (PCS) is
recognized ratably over the term of the support. Revenue allocated to
professional service is generally recognized as the services are performed.
In accordance with SOP 97-2, the Company has analyzed all of the
elements included in its multiple-element arrangements and determined that it
has sufficient evidence of fair value to allocate revenue to the license and PCS
components of its product licenses. Accordingly, revenue from perpetual
34
36
licenses is recognized upon delivery and revenue from PCS, ratably. With respect
to time-based licenses, except as described in the next sentence, the portion of
the license fee allocated to the license component is recognized upon delivery
of the software product and the portion of the fee allocated to PCS is
recognized ratably over the term of the support. Software subscriptions are
recognized on a ratable basis. Certain of the Company's contracts with
customers, particularly TSLs entered into in the fourth quarter, included
unspecified additional software products and/or payment terms that extended
beyond twelve months. The Company recognizes revenue from contracts which
include unspecified additional software products in an amount that is the lesser
of amounts due and payable or the ratable portion of the entire fee. Revenue
from contracts with extended payment terms are recognized as payments become due
and payable.
Accounts receivable include amounts due from customers for which revenue
has been recognized. Deferred revenue includes amounts received from customers
for which revenue has not been recognized.
Property and Equipment. Property and equipment are recorded at cost.
Depreciation and amortization of owned assets are provided using the
straight-line method over the estimated useful lives of property and equipment
of three to five years. Leasehold improvements are amortized using the
straight-line method over the remaining lease term or the economic useful life
of the related asset, whichever is shorter. Property and equipment detail is as
follows:
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
-------------------------------- ----------- -------------
(in thousands) 2000 1999 1998
--------- --------1999
- -------------- ----------- ----------- -------------
(in thousands)
Computer and other equipment................................equipment $ 230,188 $ 176,949 $ 173,088
$127,055
Furniture and fixtures......................................fixtures 20,839 19,227 19,102
15,341
Land........................................................Land 50,148 48,214 40,315
29,414
Leasehold improvements......................................improvements 31,765 27,010 26,662
23,579
--------- ----------------- ---------
332,940 271,400 259,167 195,389
Less accumulated depreciation and amortization..............amortization (175,697) (136,282) (132,963)
(95,391)
--------- ----------------- ---------
$ 157,243 $ 135,118 $ 126,204
$ 99,998
========= ================= =========
Software Development Costs. Capitalization of computer software
development costs begins upon the establishment of technological feasibility,
which is generally the completion of a working prototype. Software development
costs capitalized were $1.0 million for 2000, $1.0 million for 1999 and $2.1
million for 1998 and $4.2 million
for 1997.1998.
Amortization of computer software development costs is computed as the
greater of the ratio of current product revenue to the total of current and
anticipated product revenue or the straight-line method over the software's
estimated economic life of approximately two years. The Company recorded
amortization of $1.0 million for 2000, $1.6 million for 1999 and $2.2 million
for 1998, respectively. For the one month ended October 31, 1999, software
development costs and $3.7 million
for 1997, respectively.the associated amortization amount were not material.
Amortization of Intangible Assets. Amortization of intangible assets
consists of goodwill and goodwill-like assets such as assembled workforce.
Goodwill represents the excess of the aggregate purchase price over the fair
value of the tangible and identifiable intangible assets acquired by the Company
and, under the Company's accounting policies, is being amortized over estimated
useful lives ranging from fourthree to five years. The Company assesses the
recoverability of goodwill by determining whether the amortized asset over its useful life may be
recovered through estimated future undiscounted cash flows.flows over its useful life.
A review of the intangible assets has been completed and it has been determined
that the values are properly stated and no adjustments are required.
Amortization of intangible assets charged to operations amounted to $15.1
million in fiscal 2000, $1.2 million for the one month ended October 31, 1999,
$7.9 million in fiscal 1999 and was not material in fiscal 1998 and 1997, respectively.1998.
35
37 38
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
Accrued Liabilities. Accrued liabilities consist of:
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
-------------------------------- ----------- -------------
(in thousands) 2000 1999 1998
-------- --------1999
- -------------- ------------ ----------- ------------
(in thousands)
Payroll and related benefits................................benefits $ 80,207 $ 63,687 $ 79,478
$ 63,865
Accrued merger and acquisition costs........................ 371 3,513
Other accrued liabilities................................... 29,932 34,976liabilities 48,122 26,703 30,303
-------- -------- Total.............................................--------
Total $128,329 $ 90,390 $109,781
$102,354======== ======== ========
Income Taxes. The Company accounts for income taxes using the asset-and-liabilityasset and
liability method. Under the asset and liability method, deferred tax assets and
liabilities are recognized for the future tax consequences attributable to
differences between the financial statement carrying amounts of existing assets
and liabilities and their respective tax bases. Deferred tax assets are
recognized for deductible temporary differences, net operating loss
carryforwards, and credit carryforwards if it is more likely than not that the
tax benefits will be realized. To the extent a deferred tax asset cannot be
recognized under the preceding criteria, a valuation allowance has been
established.
Earnings per Share. Basic earnings per share is computed using the
weighted-average number of common shares outstanding during the period. Diluted
earnings per share is computed using the weighted-average number of common
shares and potentialpotentially dilutive common shares outstanding during the period.
PotentialPotentially dilutive common shares consist of the weighted-average number of
employee stock options outstanding, computed using the treasury stock method.
The following is a reconciliation of the weighted-average common shares
used to calculate basic net income per share to the weighted-average common
shares used to calculate diluted net income per share for fiscal 2000, 1999 and
1998 and 1997:the one-month ended October 31, 1999:
ONE
YEAR ENDED MONTH ENDED YEARS ENDED
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
------------------------------------- ----------- ------------------
(in thousands) 2000 1999 1999 1998
1997
------- -------------- ----------- ----------- ------ ------
(in thousands)
Weighted-average common shares used to
calculate basic net income per share............................................share 68,510 70,400 70,118 66,568
62,852
StockWeighted-average stock options outstanding...................................outstanding 2,488 -- 3,304 2,956
3,073------ ------ ------ ------
Weighted-average common shares used to
calculate diluted net income per share..........................................share 70,998 70,400 73,422 69,524
65,925====== ====== ====== ======
Stock-Based Compensation. As permitted under SFAS No. 123, "Accounting
for Stock-Based Compensation," the Company has elected to follow Accounting
Principles Board Opinion No. 25 (APB 25), "Accounting for Stock Issued to
Employees," in accounting for stock-based awards to employees.
Reclassifications. Certain amounts reported in previous years have been
reclassified to conform to the fiscal 19992000 presentation.
NOTE 2. CHANGE IN FISCAL YEAR END
On July 15, 1999, the Board of Directors determined that Synopsys'
fiscal 2000 and subsequent fiscal years shall end on the Saturday nearest to
October 31. As a result, fiscal 2000 commenced on October 31, 1999 and ended on
October 28, 2000. The period from October 3, 1999 through October 30, 1999 was a
transition period. Total revenue and gross margin for the one-month ended
October 31, 1998 were $28.2 million and $19.5 million, respectively. In
addition, benefit for income taxes and net loss for the one month ended October
31, 1998 were $5.8 million and $10.3 million, respectively. For the one-month
ended October 31, 1998, basic and diluted loss was $0.15 per share computed
using net loss of $10.3 million and weighted-average common shares of 68.4
million. (Information related to October 1998 is unaudited).
36
38
NOTE 3. BUSINESS COMBINATIONS
Pooling-of-Interests Combinations. In fiscal 2000, the Company did not
account for any business combinations using the pooling-of-interests method. In
fiscal 1999, the Company issued approximately 1.4 million shares of its common
stock for all the outstanding stock of Everest Design Automation, Inc.
(Everest), a developer of integrated circuit routing and related technology and
reserved approximately 120,000 shares of its common stock for issuance under
Everest's stock option plan, which the Company assumed in the transaction. The
business combination was accounted for as a pooling-of-interests,pooling of interests, and
accordingly, the Company's consolidated financial statements have been restated
to include the financial position and results of Everest for all periods presented.prior
to the merger date. The Board of Directors approved the rescission of the
Company's July 1998 stock repurchase program in order to comply 38
39
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
with
pooling-of-interests accounting guidance provided in the SEC Staff Accounting
Bulletin (SAB) No. 96. In fiscal 1998, and fiscal 1997, Everest issued shares of its preferred
stock for $5.9 million and $1.1 million, respectively.million. The Everest preferred shares are presented in the
Consolidated Statements of Stockholders' Equity and Comprehensive Income in
terms of equivalent shares of the Company's common stock.
In fiscal 1998, the Company issued approximately 11.3 million shares of
its common stock for all of the outstanding stock of Viewlogic, a worldwide
supplier of EDA software. In addition, options to acquire Viewlogic's common
stock were exchanged for approximately 2.8 million shares of the Company's
common stock. In
fiscal 1997, the Company issued approximately 10.3 million shares of its common
stock for all of the outstanding stock of Epic Design Technology, Inc. (EPIC), a
developer of design automation tools for deep submicron design in the area of
integrated circuit power. In addition, options to acquire EPIC's common stock
were exchanged for approximately 1.5 million shares of the Company's common
stock. TheseThe business combinations werecombination was accounted for as pooling-of-interests,a pooling of
interests, and accordingly, the Company's consolidated financial statements have
been restated to include the financial position and results of EPIC and Viewlogic for
all periods presented.fiscal 1998.
During fiscal 1998, the Company sold VSI, the PCB/Systems business
design segment of the Viewlogic business to a management-led buy-out group for
$51.9 million in cash. As a result of the transaction, the Company recorded an
extraordinary gain of $26.5 million, net of income tax expense, in the fourth
quarter of fiscal 1998. The Company retained a minority investment of 14.9%
(fully diluted) in the new company. VSI has announced that it has agreed to
mergecompany, Viewlogic Systems, Inc. During fiscal 2000,
Viewlogic Systems, Inc. merged with Summit Design, Inc. and formed a new entity,
Innoveda, Inc. The Company retains a minority equity investment in Innoveda.
The following information represents revenue and net income (loss) of
the separate enterprises through the periods preceding the business combinations
and the combined results following the business combinations.
YEAR ENDED YEARS ENDED
OCTOBER 31, SEPTEMBER 30,
--------------------------------(in thousands) 2000 1999 1998
1997
-------- -------- --------- -------------- --------- --------- ---------
(in thousands)
Total revenue:
Synopsys................................................. $806,098 $639,658 $469,277
Everest..................................................Synopsys $ 783,778 $ 806,098 $ 639,658
Everest -- -- --
Viewlogic................................................Viewlogic -- -- 78,282
147,811
EPIC..................................................... -- -- 29,868
-------- -------- --------
Combined................................................... $806,098 $717,940 $646,956
======== ======== ========--------- --------- ---------
Combined $ 783,778 $ 806,098 $ 717,940
========= ========= =========
Net income (loss):
Synopsys(1).............................................. $162,123Synopsys (1) $ 97,778 $ 162,123 $ 90,157
$ 69,490
Everest..................................................Everest -- (761) (2,256)
(236)
Viewlogic................................................Viewlogic -- -- 1,545
9,592
EPIC..................................................... -- -- 2,904
-------- -------- --------
Combined................................................... $161,362--------- --------- ---------
Combined $ 97,778 $ 161,362 $ 89,446
$ 81,750
======== ======== ================= ========= =========
- ---------------
(1) Includes extraordinary gains of $28.4 million, net of income tax
expense, in fiscal 1998.
3937
40
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)39
The Company recorded merger-related and other costs of $51.0 million and
$11.4 million in fiscal
1998 and 1997.1998. The following table presents the components of merger-related and other
costs recorded in fiscal 1998, along with charges against the reserves through
September 30, 1999:fiscal 2000.
NON-CASH
WRITE-OFF
(in thousands) TOTAL CHARGE AMOUNTS WRITE-OFF RESERVE
CHARGE PAID OF ASSETS
BALANCE
------- --------- -------------- ------------ ------------ --------- -------
(in thousands)
Transaction costs...................................costs $ 9,245 $ (9,154)(9,245) $ -- $ 91
Employee termination and
transition costs...........costs 10,975 (10,830)(10,975) -- 145
Write-off of equipment and
other assets.............assets 8,367 -- (8,367)
--
Legal and other settlements.........................settlements 6,894 (6,885)(6,894) -- 9
Redundant facility and other costs..................costs 15,528 (15,402)(15,528) --
126
------- -------- ------- ----
Total..................................... $51,009 $(42,271) $(8,367) $371
=======-------- --------
Total $ 51,009 $(42,642) $ (8,367)
======== ======= ============ ========
Purchase Combinations. During the three fiscal years ended October 31,
2000, and September 30, 1999 1998 and 1997,1998, the Company made a number of purchase
acquisitions. Pro forma results of operations have not been presented since the
effects of the acquisitions were not material to the Company's consolidated
financial position, results of operations or cash flows for the periods
presented. The consolidated financial statements include the operating results
of each business from the date of acquisition. The purchase price of each
transaction was allocated to the acquired assets and liabilities based on their
estimated fair values as of the date of the respective acquisitions.
The excess purchase price over the estimated value of the net tangible
assets acquired was allocated to various intangible assets, consisting primarily
of developed technology and goodwill, as well as goodwill-like assets such as
assembled workforce. The values assigned to developed technologies related to
each acquisition were based upon future discounted cash flows related to the
existing product'sproducts' projected income streams. The values of the assembled
workforces were based upon the cost to replace those workforces. Amounts
allocated to developed technology, workforce and goodwill are being amortized on
a straight-line basis, generally over foura period of three to five-year periods.five years.
The amounts allocated to purchased research and development were
determined through established valuation techniques in the high-technology
industry and were expensed upon acquisition, because technological feasibility
had not been established and no future alternative uses existed. Research and
development costs to bring the products from the acquired companies to
technological feasibility are not expected to have a material impact on the
Company's future results of operations or cash flows.
In fiscal 2000, the Company acquired VirSim, a software product, from
Innoveda, Inc.; The Silicon Group, Inc. (TSG), a privately held provider of
integrated circuit design and intellectual property integration services; and
Leda, a privately held provider of RTL coding-style-checkers.
In fiscal 1999, the Company acquired Gambit Automated Design, Inc.
(Gambit), a privately held provider of place and route software and physical
design services,services; Stanza Systems, Inc. (Stanza), a privately held company with
physical layout editor expertise and technology,technology; Smartech OY (Smartech), a
privately held design services firm with expertise in the design of wireless
communication devicesdevices; and the rights to CoverMeter, a Verilog code coverage
tool, from Advanced Technology Center of Massachusetts. The Company also
completed the acquisition of Apteq, Inc. (Apteq), which has an expertise in
analog simulation and Verilog-A product.
In fiscal 1998, the Company acquired SSI,Systems Science, Inc. (SSI), a
developer of tools for electronic design verification and test, and two small
privately held companies in the EDA industry. The acquisitions were accounted
for as purchases with the Company exchanging a combination of cash of $26.0
million and notes of $12.0 million. In addition, the Company reserved
approximately 318,000 shares of its common stock for issuance under SSI's stock
option plan, which the Company assumed in the acquisition. The total purchase
price of $51.3 million was allocated to the acquired assets and liabilities
38
40
based on their estimated fair values as of the date of the acquisition.
Approximately $33.1 million was allocated to in-process research and developmentIPRD and other costs
40
41
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED) and charged to
operations because the acquired technology had not reached technological
feasibility and had no alternative uses.
A summary of the Company's purchase transactions during fiscal 2000,
1999 and 1998 that included in-process
research and developmentIPRD charges, if any, is included in the following
table:
ENTITY OR PRODUCT NAME CONSIDERATION IPRD CHARGE FORM OF CONSIDERATION
- ---------------------- ------------- ----------- ---------------------
FISCAL 2000:
(in millions)
- -------------
Leda $ 7.7 $1.7 $7.5 million cash
VirSim $ 7.0 $ -- $7.0 million cash
TSG $ 3.0 $ -- $1.8 million cash, reserve of 33,985
common shares for issuance under
TSG's stock option plan
FISCAL 1999:
(in millions)
- -------------
Gambit $41.3 $13.9 $29.2 million cash, notes payable of
$8.0 million, reserve of 78,000 shares
of common stock for issuance under
Gambit's stock option plan.plan
Stanza 15.4$15.4 $ 4.1 $11.0 million cash, issuance of 46,000
shares of common stock and reserve of
21,000 shares of common stock for
issuance under Stanza's 1998 stock
option plan.plan
Smartech $ 9.7 $ -- $5.8 million cash, $3.9 million (not
included in purchase price) placed in
an escrow contingent on continued
employment of certain employees.employees
CoverMeter $ 4.5 $ 2.4 $2.3 million cash, notes payable of
$2.2 million.million
Apteq $ 2.0 $ 0.8 $1.0 million cash, notes payable of
$0.6 million and $0.4 million
assumption of debt.debt
FISCAL 1998:
(in millions)
- -------------
SSI $47.1 $28.9 $26.0 million cash, notes payable of
$12.0 million, reserve of 318,000
shares of common stock for issuance
under SSI's stock option plan
ATTI $ 3.2 $ 3.2 $2.2 million cash, notes payable $1.0
million
Radiant Design Tools $ 1.0 $ 1.0 $1.0 million cash
39
41
NOTE 3.4. FINANCIAL INSTRUMENTS
Cash, Cash equivalents and investments. All cash equivalents, short-term
investments, and non-current investments have been classified as
available-for-sale securities and consist of the following:are detailed as follows:
OCTOBER 31, 2000 UNREALIZED UNREALIZED ESTIMATED
(in thousands) COST GAINS LOSSES FAIR VALUE
--------- -------------- --------- ---------- ---------- ----------
SEPTEMBER 30, 1999
(in thousands)
Classified as current assets:
Taxable commercial paper...................... $111,321Cash 83,750 -- -- 83,750
Money market funds 59,377 -- -- 59,377
Tax-exempt municipal obligations 211,583 -- (3) 211,580
Money market preferred stock 60,220 -- -- 60,220
Municipal auction rate preferred stock 5,014 -- -- 5,014
Corporate note 5,197 -- (8) 5,189
Certificate of deposit 516 -- -- 516
US government agency note 9,995 -- (2) 9,993
--------- --------- --------- ---------
435,652 -- (13) 435,639
Classified as non-current assets:
Equity securities 41,632 85,109 -- 126,741
--------- --------- --------- ---------
Total $ 477,284 $ 85,109 $ (13) $ 562,380
========= ========= ========= =========
OCTOBER 31, 1999 UNREALIZED UNREALIZED ESTIMATED
(in thousands) COST GAINS LOSSES FAIR VALUE
- -------------- --------- ---------- ---------- ----------
Classified as current assets:
Cash $ 102,621 $ -- $ -- $111,321$ 102,621
Taxable commercial paper 120,997 -- (163) 120,834
Money market funds............................funds 154,219 -- -- 154,219
Tax-exempt municipal obligations 161,691 -- -- 161,691
Money market preferred stock 72,651 2 -- 72,653
Municipal auction rate preferred stock 10,027 -- -- 10,027
Certificate of deposit 62,425 8 -- 62,433
Federal note 24,971 -- (60) 24,911
--------- --------- --------- ---------
709,602 10 (223) 709,389
Classified as non-current assets:
Equity securities 40,516 17,135 -- 57,651
--------- --------- --------- ---------
Total $ 750,118 $ 17,145 $ (223) $ 767,040
========= ========= ========= =========
SEPTEMBER 30, 1999 UNREALIZED UNREALIZED ESTIMATED
(in thousands) COST GAINS LOSSES FAIR VALUE
-------- --------- ---------- ----------
Classified as current assets:
Cash $102,510 $ -- $ -- $102,510
Taxable commercial paper 111,321 -- -- 111,321
Money market funds 157,966 -- -- 157,966
Tax-exempt municipal obligations..............obligations 178,273 -- -- 178,273
Money market preferred stock..................stock 67,208 -- -- 67,208
Municipal auction rate preferred stock........stock 14,522 -- -- 14,522
Certificate of deposit........................deposit 47,414 -- -- 47,414
Federal Note..................................note 24,971 -- -- 24,971
-------- ------- ------- -------- 601,675-------- --------
704,185 -- -- 601,675704,185
Classified as non-current assets:
Equity securities.............................securities 40,517 12,760 -- 53,277
-------- ------- --------------- -------- --------
Total securities...................... $642,192 $12,760$744,702 $ 12,760 $ -- $654,952$757,462
======== ======= =============== ======== ========
4140
42
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
UNREALIZED UNREALIZED ESTIMATED
COST GAINS LOSSES FAIR VALUE
-------- ---------- ---------- ----------
SEPTEMBER 30, 1998
(in thousands)
Classified as current assets:
Tax-exempt commercial paper................... $ 23,806 $ -- $ -- $ 23,806
Money market funds............................ 37,699 -- -- 37,699
Tax-exempt municipal obligations.............. 282,542 26 -- 282,568
Money market preferred stock.................. 122,975 -- -- 122,975
Municipal auction rate preferred stock........ 34,078 -- -- 34,078
Certificate of deposit........................ 461 -- -- 461
-------- ------- ------- --------
501,561 26 -- 501,587
Classified as non-current assets:
Tax-exempt municipal obligations.............. 253 2 -- 255
Equity securities............................. 19,820 22,111 (3,921) 38,010
-------- ------- ------- --------
20,073 22,113 (3,921) 38,265
-------- ------- ------- --------
Total securities...................... $521,634 $22,139 $(3,921) $539,852
======== ======= ======= ========
The associated tax expense for unrealized gains was $3.7At October 31, 2000, $153.1 million $2.2of current cash, cash equivalents
and investments is classified as cash and cash equivalents and $282.5 million is
classified as short-term investments. At October 31, 1999, $309.4 million and
$5.2$400.0 million in fiscalof current cash, cash equivalents and investments are classified
as cash and cash equivalents and short-term investments. At September 30, 1999,
1998 and 1997, respectively. The
associated tax benefit for reclassification adjustment was $6.4 million, $5.1$285.3 million and $2.4$418.9 million in fiscal 1999, 1998of current cash, cash equivalents and
1997,investments are classified as cash and cash equivalents and short-term
investments, respectively. Short-term investments include tax-exempt municipal
obligations which have underlying maturities of lessmore than one year or containyear. However,
such investments have put options thator reset dates within one year and are either
supported by a letter of credit from a top-rated bank or insurance company or
are over-collateralized for redemption at par at the reset date. Therefore, the underlying maturity for certain items may exceed one year. At September 30, 1999,October 31,
2000, the underlying maturities of the short-term investments are $389.6$65.8 million
within one year, $14.9$45.5 million within five to ten years and $197.2$171.2 million after
ten years. At September 30, 1999, $182.8 million and $418.9 millionThese investments are generally classified as cash equivalentsavailable for sale, and
short-term investments, respectively. At September 30,
1998, $61.5 million and $440.1 million are classifiedrecorded on the balance sheet at fair market value with unrealized gains or
losses reported as cash equivalents and
short-term investments, respectively.a separate component of accumulated other comprehensive
income, net of tax. Realized gains and losses on sales of short-term investments
have not been material.
During fiscal 1999Strategic Investments. The Company's strategic investment portfolio
consists of minority equity investments in several publicly traded companies and
1998,investments in privately held companies, many of which can still be considered
in the start-up or development stages. The securities of public traded companies
are generally classified as available for sale and are reported at fair value,
with unrealized gains or losses, net of tax, recorded in stockholders' equity.
The securities of privately held companies are reported at cost. The Company
realizedutilizes forward sale contracts to reduce financial market risk and to lock in
gains on sales of long termpublicly-traded investments of $19.6 millionwhich will be realized in fiscal year 2001
and $13.9 million, which are included in other income, net.
Strategic investments. In May 1996, the Company purchased 1,207,000 shares,
approximately 9.9 percent of the outstanding shares of Cooper and Chyan
Technology, Inc. (CCT), for $14.50 per share, pursuant to a strategic
relationship between the companies. In April 1997, the Company purchased an
additional 86,000 shares for $15.00 per share and the investment was classified
as available-for-sale. In May 1997, CCT and Cadence consummated a merger,
whereby each share of CCT was converted to 0.85 shares of Cadence stock.
In June 1997, the Company, through the sale of Arkos Design, Inc. ("Arkos")
acquired $9.5 million of Quickturn warrants and common stock. In May 1999,
Quickturn and Cadence consummated a merger, whereby each share of Quickturn was
converted into 1.27 shares of Cadence stock. At the time of the conversion, the
Company recognized a realized loss of $0.3 million, which is included in other
income, net. As of September 30, 1999, the Company owns 2,335,190 shares of
Cadence stock.
42
43
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)beyond.
The Company entered into a put and call contractforward sale contracts in the fourth quarter of
fiscal 19982000 for the sale through November 15, 2001 of 425,000the 1,344,188 shares of
Cadence stock, 114,987 shares withof Broadcom stock and 687,804 shares of Nvidia
stock at forward prices ranging from $20.3734 to $27.6383, $231.196 to $247.177,
and expiration
dates as follows:
DATE SHARES PUT STRIKE CALL STRIKE
---- ------- ---------- -----------
December 15, 1999........................................... 105,000 $27.31 $33.78
March 15, 2000.............................................. 105,000 $27.31 $34.50
June 15, 2000............................................... 105,000 $27.31 $35.37
September 15, 2000.......................................... 110,000 $26.60 $35.28
$59.0188 to $80.7560, respectively.
As of September 30, 1999,October 31, 2000, the fair market value of the puts and calls,forward sales
against cost, based on athe quoted market priceprices of $13.44, was $11.0 million, which has$25.6875 for Cadence shares,
$227.0625 for Broadcom shares and $61.25 for Nvidia shares, have been recorded
in unrealized gains on investments in the stockholders' equity as a component of accumulated other comprehensive
income.
During fiscal 1998,Foreign Exchange Hedging. The Company conducts business on a global
basis. Consequently, the Company enters into foreign exchange forward contracts
to reduce the impact of certain currency exposures. As of October 31, 2000, the
Company had an investment in Artisan Components
(Artisan) of 594,300 shares. The Company entered into a forward contract for the
sale of its Artisan shares which expired in fiscal 1999. During fiscal 1999, the
Company realized gains on the sale of its Artisan shares of $7.9 million, which
is included in other income.
Foreign exchange hedging. The Company has two foreign exchange lines of
credit available totaling $120.0 million, which expire in July and October 2000.
The Company had $45.0$47.5 million of short-term foreign exchange forward contracts
outstanding which approximated the fair value of such contracts and their
underlying transactions at September 30, 1999.transactions. These contracts are denominated in the Japanese Italian, German, Frenchyen and
British currencies.the euro. The outstanding forward contracts have maturities that expire in
approximately one month. The foreign currency gains and losses on forward
exchange contracts and their underlying transactions resulting from market
adjustments are included in earnings when the
underlying foreign currency denominated transaction is recognized.earnings. Gains and losses related to these
instruments at September 30, 1999October 31, 2000 were not material. In
addition, the Company has not terminated or extinguished any foreign exchange
forward contracts. The Company does not
anticipate any material adverse effect on its consolidated financial position,
results of operations, or cash flows resulting from the use of these
instruments.
Long-term debt.Debt. During fiscal 1999, in connection with the acquisition of
Apteq,2000, the Company issued $0.6entered into an
equipment lease agreement with a total lease obligation of $0.8 million, in notes, which bear interest at 5.0%,
and are payable upon the earlier of achievement of certain milestones or at
maturity in fiscal 2006. The note was recorded at fair value of $0.6 million,
using a discount rate commensurate with the risks involved. As of September 30,
1999, the note had a balance of $0.6 million, all of
which isapproximately $0.3 million was included in long-term debt.
During fiscal 1999, in connection with the acquisitiondebt as of Gambit, the
Company issued $8.0 million in notes, which bear interest at the U.S. Treasury
T-bill Rate at set quarterly periods, and are payable upon the earlier of
achievement of certain milestones or at maturity in fiscal 2006. The notes were
recorded at fair value of $8.0 million, using a discount rate commensurate with
the risks involved. As of September 30, 1999, the notes had a balance of $8.0
million, of which $4.8 million is included in long-term debt.October
31, 2000.
During fiscal 1996, the Company and IBM entered into a six-year Joint
Development and License Agreement Concerning EDA Software and Related
Intellectual Property (the IBM Agreement). In accordance with the IBM Agreement,
the Company paid IBM $11.0 million in cash and issued $30.0 million in notes,
which bear interest at 3%, and are payable to IBM upon the earlier achievement
of scheduled milestones or at maturity in fiscal 2006. During fiscal 1998, the
Company recorded an extraordinary gain on extinguishment of debt of $1.9
million, net of income tax expense of $1.0 million, related to the cancellation
of certain interest bearing notes issued by the Company to IBM. During fiscal
41
43
1999, the Company settled the remaining balance of the long-term debt related to
the modified IBM Joint and Development and License Agreement and dissolved the
original agreement, which resulted in no extraordinary gain.
The fair value of the Company's long-term debt approximates the carrying
amount.
43
44
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
NOTE 4.5. COMMITMENTS AND CONTINGENCIES
The Company leases its domestic and international facilities under
cancelable, non-cancelable and month-to-month operating leases and certain
office equipment under operating leases. Rent expense was $29.1 million, $23.5
million and $25.5 million in 2000, 1999 and $25.2 million in1998, respectively. For the one
month ended October 31, 1999 1998 and 1997, respectively.rent expense was $1.9 million.
Future minimum lease payments as of September 30, 1999October 31, 2000 are as follows:
(in thousands)
FISCAL YEARS ENDING
-------------------Fiscal Years
- ------------
2000........................................................2001 $ 28,032
2001........................................................ 24,264
2002........................................................ 20,375
2003........................................................ 13,586
2004........................................................ 10,010
Thereafter.................................................. 26,47731,310
2002 28,457
2003 17,086
2004 11,225
2005 9,777
Thereafter 31,427
--------
Total minimum payments required................... $122,744required $129,282
========
NOTE 5.6. STOCKHOLDERS' EQUITY
Stock Repurchase Program.Programs
On July 31, 2000, the Company announced that its Board of Directors
authorized a stock repurchase program under which Synopsys common stock with a
market value up to $500 million may be acquired in the open market. The stock
repurchase program replaced all prior repurchase programs authorized by the
Board. Under the new program, share purchases may be made in the open market at
prevailing prices and ending when all available funds have been spent or upon
termination of the program by the Board. Repurchased shares are to be used for
issuance under Synopsys' employee stock plans and for other corporate purposes.
During fiscal 2000, the Company purchased 9,931,500 shares at an average price
of $40.02 per share, under all share repurchase programs.
In June 1999, the Board of Directors authorized a stock repurchase
program under which Synopsys' common stock with a market value of up to $200.0$200
million may be acquired in the open market over a seven month
period.market. The repurchased shares arewere to be
used for the issuance ofunder Synopsys' employee stock plans and for other corporate
purposes. During fiscal 1999, the Company purchased 1,680,000 shares at an
average price of $56.76 per share. This stock repurchase program was terminated
by the Board as noted in the paragraph above.
In July 1998, the Board of Directors authorized the repurchase of up to
3,250,000 shares of the Company's outstanding common stock in the open market
over the following 24 months. The repurchased shares were to be used for
issuance under the Company's employee stock plans and for other corporate
purposes. During fiscal 1998, the Company purchased approximately 353,000 shares
at an average price of $35.00.$35.00 per share. In October 1998, the Company announced
that it had rescinded the stock repurchase program to comply with
pooling-of-interests accounting guidance provided in the SEC SAB No. 96, Treasury Stock
Acquisitions Following Consummation of a Business Combination Accounted For as a
Pooling of Interests (See Note 2)3).
Preferred Shares Rights Plan. The Company has adopted a number of
provisions that could have anti-takeover effects. In September 1997, the Board
of Directors adopted a Preferred Shares Rights Plan. In
42
44
addition, the Board of Directors has the authority, without further action by
its shareholders, to fix the rights and preferences and issue shares of,
authorized but undesignated shares of Preferred Stock. This provision and other
provisions of the Company's Restated Certificate of Incorporation and Bylaws and
the Delaware General Corporation Law may have the effect of deterring hostile
takeovers or delaying or preventing changes in control or management of the
Company, including transactions in which the shareholders of the Company might
otherwise receive a premium for their shares over then current market prices.
The rights expire on October 24, 2007.
Employee Stock Purchase Plan. Under the Company's 1992 Employee Stock
Purchase Plan (ESPP) 4,650,0005,850,000 shares have been authorized for issuance as of
September 30, 1999.October 31, 2000. Under the ESPP, employees are granted the right to purchase
shares of common stock at a price per share that is 85% of the lesser of: the
fair market value of the shares at (i) the beginning of a rolling two-year
offering period, or (ii) the end of each semi-annual purchase period. During
fiscal 2000, the one-month ended October 31, 1999, 1998fiscal 1999 and 1997,1998 shares
totaling 512,988, 225,347, 460,438, 433,036 and 457,877,433,036, respectively, were issued under
the plan at average prices of $32.63, $39.30, $31.73, $27.61 and $26.96$27.61 per share,
respectively. As of September 30, 1999, 2,418,983October 31, 2000, 2,880,648 shares of common stock arewere
reserved for issuance under the ESPP.
44
45
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
Stock Option Plans. Under the Company's 1992 Stock Option Plan (the 1992
Plan), the Board of Directors may grant either incentive or non-qualified stock
options to purchase shares of the Company's stock to eligible individuals at not
less than 100% of the fair market value of those shares on the grant date. The
stock options issued to new employees typically vest 25% after one year with the
remaining options vesting on a pro rata basis over the following 36 months,
while stock options issued to existing employees typically vest on a pro rata
basis over 48 months. Stock options expire ten years from the date of grant. As
of September 30, 1999, 3,940,615October 31, 2000, 2,034,119 shares of common stock are reserved for future
grants.
Under the Company's Non-Statutory Stock Option Plan (the 1998 Plan),
3,116,73617,242,534 shares of common stock have been reserved for issuance for grantingissuance. Pursuant to
the 1998 Plan, the Board of Directors may grant non-qualified stock options to
employees, excluding officers and directors.
Exercisability,executive officers. Exercisibility, option price and other
terms are determined by the Board of Directors, but the option price shall not
be less than 100% of the fair market value of the stock at the date of grant. Stockgrant date. The
stock options currently expire no later than ten
years and generallyissued to new employees typically vest at the rate of 25% after one year fromwith the
date of
grant, and then ratablyremaining options vesting on a pro rata basis over the following 36 months,
while stock options issued to existing employees typically vest on a pro rata
basis over 48 months. At September 30, 1999,
345,980October 31, 2000, 1,034,956 shares of common stock arewere
reserved for future grants.
Under the Company's 1994 Non-Employee Directors Stock Option Plan (the
Directors Plan), a total of 300,000450,000 shares have been reserved for issuance.
Pursuant to the Directors Plan, each non-employee member of the Board of
Directors is automatically granted an option to purchase 20,000 shares of the
Company's common stock upon initial appointment or election to the Board, 10,000
shares of the Company's common stock upon reelection to the Board, and 5,000
shares of the Company's common stock annually for service on Board committees,
subject to a limit of two committee-service grants per year. Stock options are
granted at not less than 100% of the fair market value of those shares on the
grant date. Stock options granted upon appointment or election to the Board vest
25% annually after one year fromon the dateday before each of grant, and then ratably over the first four Annual Meetings following
36 months.the initial appointment or election to the Board. Stock options granted upon
reelection to the Board and committee-service grants vest 100% after the first
year of continuous service. As of September 30, 1999, 9,334October 31, 2000, 45,585 shares of common
stock arewere reserved for future grants.
The Company has assumed certain option plans in connection with business
combinations (See Note 2)3). Generally, these options were granted under terms
similar to the terms of the Company's stock option plans at prices adjusted to
reflect the relative exchange ratios. All assumed plans were terminated as to
future grants upon completion of each of the business combinations.
45
46
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
Additional information concerning stock option activity under the
various plans is as follows:
43
45
OPTIONS OUTSTANDING
------------------------------------------------------------------
WEIGHTED-AVERAGE
SHARES EXERCISE PRICE
---------- -----------------------------------
Outstanding at September 30, 1996........................... 11,316,975 $22.38
Granted and assumed....................................... 8,142,696 $28.84
Exercised................................................. (2,777,096) $12.94
Canceled.................................................. (4,302,151) $34.34
----------
Outstanding at September 30, 1997...........................1997 12,380,424 $24.61
Granted and assumed.......................................assumed 4,654,557 $32.40
Exercised.................................................Exercised (2,803,421) $18.12
Canceled..................................................Canceled (2,003,247) $26.48
----------
Outstanding at September 30, 1998...........................1998 12,228,313 $28.83
Granted and assumed.......................................assumed 4,999,572 $49.10
Exercised.................................................Exercised (3,507,057) $25.00
Canceled..................................................Canceled (1,026,001) $34.09
----------
Outstanding at September 30, 1999...........................1999 12,694,827 $37.44
Granted and assumed 759,589 $58.62
Exercised (264,914) $31.74
Canceled (158,145) $40.77
----------
Outstanding at October 31, 1999 13,031,357 $38.75
Granted and assumed 16,219,919 $36.05
Exercised (1,553,811) $27.37
Canceled (2,952,662) $41.35
----------
Outstanding at October 31, 2000 24,744,803 $37.39
==========
Options Exercisable at:
September 30, 1997........................................ 4,042,590 $20.40
September 30, 1998........................................ 5,239,779 $24.08
September 30, 1999........................................1999 4,620,131 $29.41
October 31, 1999 4,565,521 $29.72
October 31, 2000 6,618,558 $36.15
The following table summarizes information about stock options outstanding at
September 30, 1999:October 31, 2000:
OPTIONS OUTSTANDING OPTIONS EXERCISABLE
----------------------------------------- ----------------------------------------------------------------------- -------------------------------
WEIGHTED-
WEIGHTED- AVERAGE WEIGHTED- WEIGHTED-
REMAINING AVERAGE AVERAGE
RANGE OF EXERCISE NUMBER CONTRACTUAL EXERCISE NUMBER EXERCISE
RANGE OF EXERCISE PRICES OUTSTANDING LIFE (IN YEARS) PRICE EXERCISABLE PRICE
- ----------------------------------------- ----------- --------------- --------- ----------- --------------------- --------
$0.11-$ 0.11 - $28.19.. 3,175,738 6.26 $21.98 2,099,351 $20.60
$28.25 - $35.50.. 3,276,076 7.86 $33.24 1,552,049 $33.16
$35.30 - $44.63.. 2,557,423 8.73 $39.62 666,138 $39.23
$45.00 - $55.75.. 2,623,460 9.48 $50.42 302,593 $49.65
$56.75 - $60.50.. 1,062,130 9.88 $59.40 -- 31.06 3,180,155 6.53 $25.10 2,001,572 $23.61
$31.25-$ --
---------- ---- ------32.25 7,084,407 9.68 $32.22 134,842 $31.47
$32.37-$37.44 5,182,888 8.28 $35.96 1,984,859 $35.06
$37.91-$42.69 5,149,675 9.12 $40.06 1,055,415 $40.03
$43.00-$65.62 4,147,678 8.63 $54.12 1,441,870 $52.68
--------- ------
---------
$0.11-$ 0.11 - $60.50.. 12,694,827 8.14 $37.44 4,620,131 $29.4165.62 24,744,803 8.69 $37.39 6,618,558 $36.15
========== ==== ====== ========= ======
Stock-Based Compensation. Under APB 25, the Company generally recognizes
no compensation expense with respect to stock-based awards to employees. Pro
forma information regarding net income and net income per share is required by
SFAS No. 123 for awards granted after September 30, 1995, as if the
44
46
Company had accounted for its stock-based awards to employees under the fair
value method of SFAS No. 123. The weighted-average estimated fair value of stock
options issued during fiscal 2000, 1999 and 1998 was $15.96, $22.88 and 1997 was $22.88, $20.32 and $12.87
per share, respectively. The weighted-average estimated fair value of shares
granted under the ESPP during fiscal 2000, 1999 and 1998 was $14.32, $13.76 and
1997 was $13.76, $11.70 and $10.74 per share, respectively. The fair value method of the Company's stock-based
awards to employees was estimated using the Black-Scholes option pricing model.
The fair value of the Company's stock-based awards to employees 46
47
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
was estimated
assuming no expected dividends and the following weighted-average assumptions,
for fiscal 2000, 1999 1998 and 1997:1998:
STOCK OPTION PLANS
--------------------------------
2000 1999 1998
1997
-------- -------- ------------ ---- ----
Expected life (in years)................................... 3.9 4.3 5.3
5.4
Risk-free interest rate....................................rate 6.3% 5.3% 5.3%
6.3%
Volatility.................................................Volatility 58.3% 51.5% 55.0% 55.1%
ESPP
-----------------------------------------------------------------
2000 1999 1998
1997
-------- -------- ------------ ---- ----
Expected life (in years)................................... 1.25 1.25 0.91.25
Risk-free interest rate.................................... 5.1 % 5.5 % 5.8%
Volatility................................................. 51.5 % 55.0 % 55.1%rate 6.1% 5.1% 5.5%
Volatility 58.3% 51.5% 55.0%
For pro forma purposes, the estimated fair value of the Company's
stock-based awards to employees is generally amortized over the options' vesting
period of four years (for options) and the six-month purchase period (for stock
purchases under the ESPP). The Company's pro forma net income and earnings per
share data, under SFAS No. 123 is as follows:
YEARS ENDED
----------------------------------------------
OCTOBER 31, SEPTEMBER 30,
--------------------------------
1999 1998 1997
-------- -------- --------
(in thousands, except per share amounts) 2000 1999 1998
- ---------------------------------------- ----------- ----------- -----------
Net income (loss)
As reported under APB 25................................. $161,36225 $ 89,44697,778 $ 81,750161,362 $ 89,446
Pro forma under SFAS No. 123.............................123 $ 90,698(757) $ 90,968 $ 44,680
$ 53,878
Earnings (loss) per share --- basic
As reported under APB 25.................................25 $ 1.43 $ 2.30 $ 1.34 $ 1.30
Pro forma under SFAS No. 123.............................123 $ (0.01) $ 1.29 $ 0.67
$ 0.86
Earnings (loss) per share --- diluted
As reported under APB 25.................................25 $ 1.38 $ 2.20 $ 1.29 $ 1.24
Pro forma under SFAS No. 123.............................123 $ 1.26(0.01) $ 0.641.26 $ 0.820.64
45
47
NOTE 6.7. INCOME TAXES
The Company is entitled to a deduction for federal and state tax
purposes with respect to employees' stock option activity. The net reduction in
taxes otherwise payable arising from that deduction has been credited to
additional paid-in capital.
The components of the Company's total income before provision for income
taxes are as follows:
YEAR ENDED ONE MONTH ENDED YEARS ENDED
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
------------------------------------------ --------------- ------------------------
(in thousands) 2000 1999 1999 1998
1997
-------- -------- --------- -------------- ---------- --------------- --------- ---------
(in thousands)
United States.............................................. $244,632 $110,998 $122,284
Foreign....................................................States $ 150,641 $ (22,405) $ 244,632 $ 110,998
Foreign (4,703) (3,075) 6,779 5,863
10,509
-------- -------- --------
$251,411 $116,861 $132,793
======== ======== ========--------- --------- --------- ---------
$ 145,938 $ (25,480) $ 251,411 $ 116,861
========= ========= ========= =========
47
48
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
The components of the provision for income taxes are as follows:
YEAR ENDED ONE MONTH ENDED YEARS ENDED
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
---------------------------------------- --------------- -----------------------
(in thousands) 2000 1999 1999 1998
1997
------- ------- -------- -------------- ----------- --------------- -------- --------
(in thousands)
Current:
Federal............................................. $54,744 $40,452 $26,998
State...............................................Federal $ 62,644 $ -- $ 54,744 $ 40,452
State 8,949 -- 7,821 5,555
4,562
Foreign.............................................Foreign 3,388 -- 2,746 2,662
5,875
------- ------- --------------- -------- -------- --------
74,981 -- 65,311 48,669
37,435
------- ------- --------------- -------- -------- --------
Deferred:
Federal.............................................Federal (30,025) (9,641) (3,909) (6,003)
(14,325)
State...............................................State (4,266) (1,377) (558) (858)
(2,062)
Foreign.............................................Foreign (3,394) (1,537) (644) 244
(29)
------- ------- --------------- -------- -------- --------
(37,685) (12,555) (5,111) (6,617)
(16,416)
------- ------- --------------- -------- -------- --------
Charge equivalent to the federal
and state tax benefit related to
employee stock options......options 10,864 2,618 29,849 13,767
30,024
------- ------- --------------- -------- -------- --------
Provision for income taxes....................... $90,049 $55,819 $51,043
======= ======= =======taxes $ 48,160 $ (9,937) $ 90,049 $ 55,819
======== ======== ======== ========
The provision for income taxes differs from the amount obtained by
applying the statutory federal income tax rate to income (loss) before income
taxes as follows:
YEAR ENDED ONE MONTH ENDED YEARS ENDED
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
---------------------------------------- --------------- -----------------------
(in thousands) 2000 1999 1999 1998
1997
------- ------- -------- -------------- ----------- --------------- -------- --------
(in thousands)
Statutory federal tax................................. $87,994 $40,901 $46,477tax $ 51,078 $ (8,918) $ 87,994 $ 40,901
State tax, net of federal benefit.....................benefit 5,555 (709) 10,756
6,121
6,712
Tax credits...........................................credits (7,248) -- (5,703) (1,665) (3,717)
Tax benefit from foreign sales
corporation............corporation (3,146) -- (6,044) (3,826)
(2,920)
Tax exempt income.....................................income (5,508) (618) (6,745) (5,911) (3,797)
Equity method for investments......................... -- -- 744
Foreign tax in excess of (less than)
U.S. statutory tax...........tax (1,194) (461) 1,457 872 1,501
Non-deductible merger and
acquisition expenses........expenses 5,454 386 3,182 7,379 6,884
In-process research and
development expenses..........expenses 829 -- 6,583 9,888
1,921
Other.................................................Other 2,340 383 (1,431) 2,060
2,673
Valuation allowance................................... -- -- (5,435)
------- ------- --------------- -------- -------- --------
$ 48,160 $(9,937) $90,049 $55,819
$51,043
======= ======= ================ ======== ======== ========
4846
49
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)48
A net deferred tax asset of $85.8 million, $48.1 million, and $35.6
million and $30.5 million is primarily included in prepaid expenses, deferred taxes, and other at
October 31, 2000 and 1999 and September 30, 1999, and 1998, respectively. The tax effects
of temporary differences and carryforwards, which give rise to significant
portions of the deferred tax assets and liabilities, are as follows:
OCTOBER 31, OCTOBER 31, SEPTEMBER 30,
----------------------------- ----------- -------------
(in thousands) 2000 1999 1998
------- -------1999
- -------------- ----------- ----------- -------------
(in thousands)
Net deferred tax assets:
Deferred tax assets:
TaxCurrent:
Net operating loss and tax credit carryovers.......................................carryovers $ 2,856 $ 2,280 $ 29
$ 220
Deferred compensation....................................... 1,352 --
Deferred revenue............................................revenue 55,325 10,264 13,356 4,346
Joint venture and acquisition costs......................... -- 4,882
Reserves and other expenses not currently deductible........deductible 15,334 19,329 18,788 23,333
Depreciation and amortization............................... 4,717 4,187
Unrealized foreign exchange losses..........................losses -- 146 147
269
Other.......................................................Other 6,899 3,898 2,727
1,187
------- ---------------- --------- ---------
80,414 35,917 35,047
Non-current:
Net operating loss and tax credit carryovers 9,683 11,401 --
Deferred compensation 3,670 1,352 1,352
Deferred revenue 21,302 -- --
Depreciation and amortization 6,081 4,867 4,717
--------- --------- ---------
40,736 17,620 6,069
--------- --------- ---------
Total deferred tax assets 121,150 53,537 41,116
Deferred tax assets......................................... 41,116 38,424
Deferred tax liabilities:
Current:
Unrealized foreign exchange losses (1,660) -- --
--------- --------- ---------
(1,660) -- --
Non-current
Unrealized gain on securities investments...................investments (33,298) (4,970) (5,104) (7,287)
Net capitalized software development costs..................costs (378) (438) (674)
------- -------
Deferred(438)
--------- --------- ---------
(33,676) (5,408) (5,542)
--------- --------- ---------
Total deferred tax liabilities....................................liabilities (35,336) (5,408) (5,542)
(7,961)
------- ---------------- --------- ---------
Net deferred tax assets..................................... $35,574 $30,463
======= =======assets $ 85,814 $ 48,129 $ 35,574
========= ========= =========
At September 30, 1999,October 31, 2000, the Company believes that it is more likely than
not that the results of future operations will generate sufficient taxable
income to realize the deferred tax assets.
The Company's United States income tax returns for fiscal years ended
September 30, 1996 and September 30, 1995 are under examination and the Internal
Revenue Service has proposed certain adjustments. Management believes that
adequate amounts have been provided for any adjustments that may ultimately
result from these examinations.
NOTE 7.8. SEGMENT DISCLOSURE
In 1999, Synopsys adopted
SFAS No. 131, Disclosures about Segments of an Enterprise and Related
Information. SFAS No. 131Information, requires disclosures of certain information regarding operating
segments, products and services, geographic areas of operation and major
customers. The method for determining what information to report under SFAS No.
131 is based upon the "management approach," or the way that management
organizes the operating segments within a company, for which separate financial
information is available that is evaluated regularly
47
49
by the Chief Operating Decision Maker (CODM) in deciding how to allocate
resources and in assessing performance. Synopsys' CODM is the Chief Executive
Officer and Chief Operating Officer.
The Company provides comprehensive design technology products and
consulting services in the electronic design automation software industry. The
CODM evaluates the performance of the Company based on profit or loss from
operations before income taxes not including merger-related costs, in-process
research and development and amortization of intangible assets. For the purpose
of making operating decisions, the CODM primarily considers financial
information presented on a consolidated basis accompanied by disaggregated
information about revenues by geographic region. There are no differences
between the accounting policies used to measure profit and loss for the Company
segment and those used on a consolidated basis. Revenue is defined as revenues
from external customers.
49
50
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
The disaggregated financial information reviewed by the CODM is as
follows:
YEAR ENDED OCTOBER 31, YEARS ENDED SEPTEMBER 30,
--------------------------------------------------------- -------------------------
(in thousands) 2000 1999 1998
1997- -------------- ---------------------- --------- --------- -------------------
(in thousands)
Revenue:
Product............................................... $ 505,847 $ 430,979 $ 408,256
Service...............................................Product $442,453 $505,847 $430,979
Service 341,325 300,251 286,961
238,700
--------- --------- ----------------- -------- --------
Total revenue................................. $ 806,098 $ 717,940 $ 646,956revenue $783,778 $806,098 $717,940
======== ======== ========
Gross margin............................................ $ 699,334 $ 624,173 $ 560,071
Direct contribution margin.............................. $ 500,710 $ 430,701 $ 405,174
Amortizationmargin $659,304 $699,334 $624,173
Operating income before amortization of intangible
assets....................... $ 7,907 $ -- $ --assets, merger-related costs, and in-process
research and development $122,014 $243,478 $174,955
The CODM did not review disaggregated financial information for the
one-month ended October 31, 1999.
Reconciliation of the Company's segment profit and loss to the Company's
income before provision for income taxes is as follows:
YEAR ENDED OCTOBER 31, YEARS ENDED SEPTEMBER 30,
--------------------------------------------------------- -------------------------
(in thousands) 2000 1999 1998
1997
---------- -------------- ---------------------- --------- ---------
(in thousands)
Direct contribution margin..............................Operating income before amortization of intangible
assets, merger-related costs and in-process
research and development $ 500,710122,014 $ 430,701243,478 $ 405,174174,955
Amortization of intangible assets (15,129) (7,907) --
Merger-related costs and in-process research and
development...........................................development (1,750) (21,176) (84,078) (16,900)
Indirect spending....................................... (265,139) (255,746) (279,842)
--------- --------- ---------
Operating income........................................income $ 105,135 $ 214,395 $ 90,877
$ 108,432
========= ========= =========
Direct contribution margin is the difference between gross margin and the
direct costs of developing and supporting Synopsys products and services. The
direct costs include all costs associated with developing, maintaining, and
marketing the software products and services of each business unit.
Indirect spending are all costs necessary to support the Company's products
and services other than direct costs. This includes all other spending necessary
to support the Companies product and service offerings, which includes but is
not limited to selling costs, administrative costs, material costs, advanced
research and development, infrastructure and facilities costs, communications
costs, and other related support activities necessary to operate Synopsys as an
ongoing concern.48
50 51
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
Revenue and long-lived assets related to operations in United States and
other geographic areas are as follows:
YEAR ENDED OCTOBER 31, YEARS ENDED SEPTEMBER 30,
------------------------------------------------------ -------------------------
(in thousands) 2000 1999 1998
1997
-------- -------- --------- -------------- ---------------------- --------- ----------
(in thousands)
Revenue:
United States............................................ $590,254 $506,566 $456,669
Europe...................................................States $ 535,023 $ 590,254 $ 506,566
Europe 141,306 126,358 128,347
109,760
Japan....................................................Japan 130,698 102,824 111,149
117,019
Other....................................................Other 55,015 46,046 40,260 35,394
Transfers between geographic areas.......................areas (78,264) (59,384) (68,382)
(71,886)
-------- -------- --------
Consolidated.......................................... $806,098 $717,940 $646,956
======== ======== ========--------- --------- ---------
Consolidated $ 783,778 $ 806,098 $ 717,940
========= ========= =========
Long-lived assets:
United States............................................ $114,526States $ 89,809192,699 $ 84,634
Other.................................................... 11,678 10,189 7,459
-------- -------- --------
Consolidated.......................................... $126,204169,456 $ 99,998109,043
Other 16,320 14,141 11,185
--------- --------- ---------
Consolidated $ 92,093
======== ======== ========209,019 $ 183,597 $ 120,228
========= ========= =========
Transfers between geographic areas represent both intercompany product
and service revenue accounted for at prices representative of unaffiliated party
transactions and export shipments directly to customers. Corporate assets
consist primarily of cash and investments. No one customer
accounted for more than ten percent of the Company's consolidated revenue in
fiscal 2000, 1999 and 1998 and 1997, respectively.the one month ended October 31, 1999.
Geographic revenue data for multi-region, multi-product transactions
reflects internal allocations and is therefore subject to certain assumptions
and the Company's methodology. Revenue is not reallocated among geographic
regions to reflect any re-mixing of licenses between different regions following
the initial product shipment.
During the fourth quarter of fiscal 2000, the Company began segregating
revenue into five categories for purposes of internal management reporting: IC
Implementation, including both the Design Compiler (DC) Family and Physical
Synthesis; Verification and Test; Intellectual Property (IP) and System Level
Design; Transistor Level Design (TLD); and Professional Services. Revenues for
each of the sectors for the fiscal years 2000, 1999 and 1998 are as follows:
YEAR ENDED OCTOBER 31, YEARS ENDED SEPTEMBER 30,
---------------------- -------------------------
(in thousands) 2000 1999 1998
- -------------- ---------------------- -------- ----------
Revenue:
IC Implementation
DC Family $272,508 $311,420 $262,537
Physical Synthesis 32,598 5,567 2,721
Verification and Test 232,985 210,319 151,770
IP and System Level Design 109,975 113,254 155,109(1)
TLD 57,659 98,446 76,975
Professional Services 78,053 67,092 68,828
-------- -------- --------
Consolidated $783,778 $806,098 $717,940
======== ======== ========
49
51
52
SYNOPSYS, INC.
NOTES TO CONSOLIDATED FINANCIAL STATEMENTS (CONTINUED)
NOTE 8.9. SELECTED QUARTERLY DATA (UNAUDITED)
THREE MONTHS ENDED
---------------------------------------------
DECEMBER MARCH JUNE SEPTEMBER
31 31 30 30
-------- -------- -------- ---------
--------------------------------------------------------------
(in thousands, except per share data) JAN. 31 APRIL 30 JULY 31 OCT. 31
- ------------------------------------- ----------- ----------- ----------- -----------
2000:
Revenue $ 216,868 $ 204,853 $ 228,835 $ 133,222
Gross margin 187,983 174,927 196,815 99,579
Income before income taxes
and extraordinary items 68,140 50,541 61,862 (34,605)
Net income 45,103 33,574 41,371 (22,270)
Earnings per share
Basic 0.64 0.49 0.61 (0.34)
Diluted 0.61 0.47 0.59 (0.34)
Market stock price range:(2)
High $ 74.69 $ 50.81 $ 51.94 $ 39.50
Low $ 43.34 $ 37.56 $ 30.94 $ 29.38
THREE MONTHS ENDED
--------------------------------------------------------------
DEC. 31 MAR. 31 JUN. 30 SEP. 30
----------- ----------- ----------- -----------
1999:
Revenue......................................... $180,226 $190,186 $207,360 $228,326Revenue $ 180,226 $ 190,186 $ 207,360 $ 228,326
Gross margin....................................margin 158,520 165,494 177,074 198,246
Income before income taxes
and extraordinary items.........................................items 59,398 48,934 65,146 77,933
Net income......................................income 40,391 26,621 41,355 52,995
Earnings per share
Basic.........................................Basic 0.58 0.38 0.58 0.75
Diluted.......................................Diluted 0.56 0.36 0.56 0.72
Market stock price range:(1)
High..........................................(2)
High $ 54.25 $ 60.56 $ 57.25 $ 64.44
Low...........................................Low $ 28.38 $ 28.3845.88 $ 45.8842.13 $ 42.13 $ 53.38
1998:
Revenue......................................... $174,212 $170,105 $179,606 $194,017
Gross margin.................................... 150,720 148,815 156,280 168,358
Income (loss) before income taxes and
extraordinary items53.38
(1) Includes $56,456 in revenue from Viewlogic's systems & PCB design
business. The segment was sold to a management-led buy-out group during
fiscal 1998.
(2)....................... (4,415) 38,325 51,695 31,256
Net income (loss)............................... (6,620) 25,174 33,834 37,058
Earnings (loss) per share
Basic......................................... (0.10) 0.38 0.50 0.54
Diluted....................................... (0.10) 0.37 0.48 0.53
Market stock price range:(1)
High.......................................... $ 46.06 $ 36.00 $ 45.81 $ 42.44
Low........................................... $ 35.06 $ 29.50 $ 30.97 $ 26.13
- ---------------
(1) The Company's common stock is traded on The Nasdaq Stock Market under
the symbol "SNPS." The stock prices shown represent quotations among
dealers without adjustments for retail markups, markdowns or commissions
and may not represent actual transactions. As of September 30, 1999,October 31, 2000, there
were approximately 520680 shareholders of record. To date, the Company has
paid no cash dividends on its capital stock, and has no current
intention to do so.
(2) Includes merger-relatedNOTE 10. SUBSEQUENT EVENT
On January 4, 2001, the Company sold the assets of the Company's Silicon
Liabraries business and other costslicenses to Artisan Components, Inc. (Artisan), for
approximately $24.6 million in cash and common stock. In addition, the Company
has subcontracted certain performance obligations under existing contracts to
Artisan. The Company is in the process of $36.0determining any losses related to the
subcontractor agreement. Direct revenue for this product line was $4.3 million,
$11.9$10.1 million and $3.1$13.8 million for the first, secondin fiscal 2000, 1999 and third quarters of fiscal 1998, respectively.
Includes in-process research and development and other costs
of $4.2 million and $28.9 million in the first and fourth quarters of fiscal
1998, respectively.50
52 53
ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND
FINANCIAL DISCLOSURE
Not applicable.
PART III
ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT
Information with respect to Directors is included under the caption
"Proposal One -- Election of Directors" in Synopsys' Notice of Annual Meeting
and Proxy Statement for Synopsys' annual meeting of stockholders to be held on
March 3, 2000April 6, 2001 (the "Proxy Statement") and is incorporated herein by reference.
Information with respect to Executive Officers is included under the heading
"Executive Officers of the Company" in Part I hereof after Item 4.
Information regarding delinquent filers pursuant to Item 405 of
Regulation S-K is included under the heading "Section 16(a) Beneficial Ownership
Reporting Compliance" under the caption "Additional Information" in the Proxy
Statement and is incorporated herein by reference.
ITEM 11. EXECUTIVE COMPENSATION
The information required by this item is included under the heading
"Executive Compensation" under the caption "Proposal One -- Election of
Directors" in the Proxy Statement and is incorporated herein by reference.
ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT
The information required by this item is included under the heading
"Security Ownership of Certain Beneficial Owners and Management" under the
caption "Proposal One -- Election of Directors" in the Proxy Statement and is
incorporated herein by reference.
ITEM 13. CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS
The information required by this item is included under the caption
"Proposal One -- Election of Directors" in the Proxy Statement and is
incorporated herein by reference.
PART IV
ITEM 14. EXHIBITS, FINANCIAL STATEMENTS, SCHEDULES AND REPORTS ON FORM 8-K
(a) The following documents are filed as part of this Annual Report on Form
10-K:
1. FINANCIAL STATEMENTS
The following documents are included as Part II, Item 8, of this Annual
Report on Form 10-K:
PAGE
----
Report of Independent Auditors..............................Auditors............................................................ 28
Consolidated Balance Sheets............................................................... 29
Consolidated Statements of Income......................................................... 30
Consolidated Balance Sheets.................................Statements of Stockholders' Equity and Comprehensive Income (Loss)........... 31
Consolidated Statements of Income...........................Cash Flows..................................................... 32
Consolidated Statements of Stockholders' Equity............. 33
Consolidated Statements of Cash Flows....................... 34
Notes to Consolidated Financial Statements.................. 35Statements................................................ 33
5351
5453
2. FINANCIAL STATEMENT SCHEDULE
The following schedule of the Company is included herein:
Valuation and Qualifying Accounts and Reserves (Schedule II)
All other schedules are omitted because they are not applicable or the
amounts are immaterial or the required information is presented in the
consolidated financial statements or notes thereto.
The following documents are included in Exhibit 23 hereto:
Exhibit 23.1 Report on Financial Statement Schedule of Synopsys, Inc.
Exhibit 23.2 Consent of KPMG LLP, Independent Auditors
3. EXHIBITS
See Item 14(c) below.
(b) REPORTS ON FORM 8-K
ReportReports on Form 8-K
filed on July 23, 1999 for the purpose of filing the
Company's press release announcing its financial results for the quarter and
nine months ended July 3, 1999, including condensed consolidated statements of
income and balance sheets, and reporting a change in the Company's fiscal year
end.
Report on Form 8-K, filed on October 28, 1999 for the purpose of filing the
Company's press release announcing its financial results for the quarter and
fiscal year ended October 2, 1999, including condensed consolidated statements
of income and balance sheets.None.
(c) EXHIBITSExhibits
EXHIBIT
NUMBER EXHIBIT DESCRIPTIONExhibit
Number Exhibit Description
- ------- ------------------------- -----------------------------------------------------------------------------------
2.1 Agreement and Plan of Merger dated October 14, 1997, by the Company, Post
Acquisition Corp. and Viewlogic Systems, Inc.(1)
3.1 Fourth Amended and Restated Certificate of Incorporation(2)
3.2 Certificate of Designation of Series A Participating Preferred Stock(3)
3.3 Restated Bylaws of Synopsys, Inc.(2)
4.1 Amended and Restated Preferred Shares Rights Agreement dated November 24, 1999(3)
4.3 Specimen Common Stock Certificate(4)
10.1 Form of Indemnification Agreement(4)
10.2 Director's and Officer's Insurance and Company Reimbursement Policy(4)
10.6 Lease Agreement, dated August 17, 1990, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga Separate
Property Trust), as amended, and Richard T. Peery, Trustee, or his successor
trustee, UTA dated July 20, 1977 (Richard T. Peery Separate Property Trust),
as amended(4)
10.7 Lease Agreement, dated March 29, 1991, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property Trust), as amended, and Richard T. Peery, Trustee, or his
successor trustee, UTA dated July 20, 1977 (Richard T. Peery Separate
Property Trust), as amended(4)
10.15 Lease Agreement, dated June 16, 1992, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property Trust), as amended, and Richard T. Peery, Trustee, or his
successor trustee, UTA dated July 20, 1977 (Richard T. Peery Separate
Property Trust), as amended(5)
54
55
EXHIBIT
NUMBER EXHIBIT DESCRIPTION
- ------- -------------------
10.16 Lease Agreement, dated June 23, 1993, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property Trust), as amended, and Richard T. Peery, Trustee, or his
successor trustee, UTA dated July 20, 1977 (Richard T. Peery Separate
Property Trust), as amended(6)
10.21 Lease Agreement, August 24, 1995, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property
52
54
Trust), as amended, and Richard T. Peery, Trustee, or his successor trustee,
UTA dated July 20, 1977 (Richard T. Peery Separate Property Trust), as amended(7)
10.25 Amendment No. 5 to Lease, dated October 4, 1995, to Lease Agreement dated August
17, 1990, between the Company and John Arrillaga, Trustee, or his successor
trustee, UTA dated July 20, 1997 (Arrillaga Family Trust), and Richard T. Peery,
Trustee, or his successor trustee, UTA dated July 20, 1997 (Richard T. Peery
Separate Property Trust), as amended(8)
10.26 Amendment No. 3 to Lease, dated October 4, 1995, to Lease Agreement dated June
16, 1992, between the Company and John Arrillaga, Trustee, or his successor
trustee, UTA dated July 20, 1997 (Arrillaga Family Trust), and Richard T. Peery,
Trustee, or his successor trustee, UTA dated July 20, 1997 (Richard T. Peery
Separate Property Trust), as amended(8)
10.27 Amendment No. 2 to Lease, dated October 4, 1995, to Lease Agreement dated June
23, 1993, between the Company and John Arrillaga, Trustee, or his successor
trustee, UTA dated July 20, 1997 (Arrillaga Family Trust), and Richard T. Peery,
Trustee, or his successor trustee, UTA dated July 20, 1997 (Richard T. Peery
Separate Property Trust), as amended(8)amended (8) Lease dated January 2, 1996 between the
Company and Tarigo-Paul, a California Limited Partnership(9)
10.29 1992 Stock Option Plan, as amended and restated(10)(11)
10.30 Employee Stock Purchase Program, as amended and restated(11)(12)
10.31 International Employee Stock Purchase Plan, as amended and restated(11)(12)
10.32 Synopsys deferred compensation plan dated September 30, 1996(11)(12)(13)
10.33 1994 Non-Employee Directors Stock Option Plan, as amended and restated(10)(11)restated(11)(14)
10.34 Form of Executive Employment Agreement dated October 1, 1997(11)(13)(15)
10.35 Schedule of Executive Employment Agreements(13)Agreements(10)
10.36 1998 Nonstatutory Stock Option Plan(11)(14)(16)
21.1 Subsidiaries of the Company
23.1 Report on Financial Statement Schedule
23.2 Consent of KPMG LLP, Independent Auditors
24.1 Power of Attorney (see page 57)
27.1-
27.55)
27.1 Financial Data Schedules
- -------------------------
(1) Incorporated by reference to Annex A to the form of prospectus contained in
the Registration Statement on Form S-4 (File No. 333-39713) of Synopsys, Inc. as
filed with the Securities and Exchange Commission on November 7, 1997
(2) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended April 3, 1999
(3) Incorporated by reference from exhibit to Amendment No. 1 to the Company's
Registration Statement on Form 8-A as filed with the Securities and Exchange
Commission on December 13, 1999
(4) Incorporated by reference from exhibit of the same number filed with the
Company's Registration Statement on Form S-1 (File No. 33-45138) which became
effective February 24, 1992
55
56
(5) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September 30,
1992
(6) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September 30,
1993
53
55
(7) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September 30,
1995
(8) Incorporated by reference from exhibit of the same number filed with the
Company's Quarterly Report on Form 10-Q for the quarterly period ended December
31, 1995
(9) Incorporated by reference from exhibit of the same number filed with the
Company's Quarterly Report on Form 10-Q for the quarterly period ended March 31,
1996
(10) Incorporated by reference from exhibit to the Company's Registration
StatementQuarterly Report on
Form S-8 (file No. 333-77597),10-Q for the quarterly period ended April 30, 2000, as filed with the
Securities and Exchange Commission on May 3, 1999June 13, 2000
(11) Compensatory plan or agreement in which an executive officer participates
(12) Incorporated by reference from exhibit to the Company's Registration
Statement on Form S-8 (file no. 333-38810), as filed with the Securities and
Exchange Commission on June 8, 2000
(13) Incorporated by reference from exhibit to the Registration Statement on
Form S-4 (File No. 333-21129) of Synopsys, Inc. as filed with the Securities and
Exchange Commission on February 5, 1997
(13)(14) Incorporated by reference from exhibit to the Company's Registration
Statement on Form S-8 (file No. 333-77597), as filed with the Securities and
Exchange Commission on May 3, 1999
(15) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended January 3, 1998
(14)(16) Incorporated by reference to exhibit to the Company's Registration
Statement on Form S-8 (File No. 333-90643) as filed with the Securities and
Exchange Commission on November 9, 1999
5654
5756
SIGNATURES
Pursuant to the requirements of section 13 or 15(d) of the Securities Exchange
Act of 1934, the registrant has duly caused this report to be signed on its
behalf by the undersigned, thereunto duly authorized, in Mountain View, State of
California, on this day of December 22, 1999.January 16, 2001.
SYNOPSYS, INC.
By /s/ AART J. DE GEUS
------------------------------------------------------------------------------------
Aart J. de Geus
Chief Executive Officer
and Chairman of the Board of Directors
(Principal Executive Officer)
By /s/ DAVID SUGISHITA
------------------------------------
David SugishitaROBERT B. HENSKE
------------------------------------------------
Robert B. Henske
Senior Vice President, Finance and Operations,
and Chief Financial Officer
(Principal Financial andOfficer)
By /s/ RICHARD T. ROWLEY
------------------------------------------------
Richard T. Rowley
Vice President, Corporate Controller
(Principal Accounting Officer)
55
57
POWER OF ATTORNEY
KNOW ALL PERSONS BY THESE PRESENTS, that each person whose signature
appears below constitutes and appoints Aart J. de Geus and David Sugishita,Robert B. Henske, and
each of them, as his true and lawful attorneys-in-fact and agents, with full
power of substitution and resubstitution, for him and in his name, place and
stead, in any and all capacities, to sign any and all amendments (including
post-effective amendments) to this Report on Form 10-K, and to file the same,
with all exhibits thereto, and other documents in connection therewith, with the
Securities and Exchange Commission, granting unto said attorneys-in-fact and
agents, and each of them, full power and authority to do and perform each and
every act and thing requisite and necessary to be done in connection therewith,
as fully to all intents and purposes as he might or could do in person, hereby
ratifying and confirming all that said attorneys-in-fact and agents, or any of
them, or their or his substitute or substitutes, may lawfully do or cause to be
done by virtue hereof. Pursuant to the requirements of the Securities Exchange
Act of 1934, this report has been signed below by the following persons on
behalf of the registrant and in the capacities and on the dates indicated:
SIGNATURE TITLE DATE
--------- ----- ----
/s/ AART J. DE GEUS Chief Executive Officer December 22, 1999January 16, 2001
- ------------------------------------------------------------------------------------- (Principal Executive Officer) and Director
Aart J. de Geus Chairman of the Board of Directors
/s/ CHI-FOON CHAN President, Chief Operating December 22, 1999Officer January 16, 2001
- -------------------------------------------------------- Officer----------------------------- and Director
Chi-Foon Chan
/s/ ANDY D. BRYANT Director December 22, 1999January 16, 2001
- -------------------------------------------------------------------------------------
Andy D. Bryant
/s/ DEBORAH A. COLEMAN Director December 22, 1999January 16, 2001
- -------------------------------------------------------------------------------------
Deborah A. Coleman
/s/ HARVEY C. JONES, JR. Director December 22, 1999January 16, 2001
- -------------------------------------------------------------------------------------
Harvey C. Jones, Jr.
57
58
SIGNATURE TITLE DATE
--------- ----- ----
/s/ WILLIAM W. LATTIN Director December 22, 1999January 16, 2001
- -------------------------------------------------------------------------------------
William W. Lattin
/s/ A. RICHARD NEWTON Director December , 1999January 16, 2001
- -------------------------------------------------------------------------------------
A. Richard Newton
/s/ SASSON SOMEKH Director December 22, 1999January 16, 2001
- -------------------------------------------------------------------------------------
Sasson Somekh
/s/ STEVEN C. WALSKE Director December 22, 1999January 16, 2001
- -------------------------------------------------------------------------------------
Steven C. Walske
5856
5958
SCHEDULE II
SYNOPSYS, INC.
--------------------------------------------
VALUATION AND QUALIFYING ACCOUNTS AND RESERVES
(IN THOUSANDS)(in thousands)
BALANCE AT ADDITIONS CHARGED BALANCE AT
BEGINNING CHARGED TO TO OTHER END OF
OF PERIOD EXPENSE(1) ACCOUNTS(2) DEDUCTIONS(3) PERIODBalance at Additions Charged Balance at
Beginning Charged to to Other End of
of Period Expense Accounts(1) Deductions(2) Period
---------- ---------- ----------- ------------- ----------
Allowance for Doubtful
Accounts and Sales Returns:
1999............................2000 $10,563 $ 3,528 $ (12) $ 4,540 $ 9,539
1 month ended 10/31/99 $10,523 $ -- $ 40 $ -- $10,563
1999 $13,210 $2,007$ 2,007 $ 911 $5,605$ 5,605 $10,523
1998............................1998 $ 8,213 $8,431$ 8,431 $(2,098) $1,336 $13,210
1997............................ $ 5,138 $5,242 $ (75) $2,092 $ 8,2131,336 $13,210
- ---------------
(1) Includes $830 charged to other income in fiscal 1997.
(2) Fiscal 1998 includes a $2,049 reduction due to the sale of Viewlogic
Systems, Inc. Other amounts are translation and other adjustments.
(3)(2) Accounts written off, net of recoveries.
57
6059
EXHIBIT INDEX
EXHIBIT
NUMBER EXHIBIT DESCRIPTIONExhibit
Number Exhibit Description
- ------- ------------------------- -----------------------------------------------------------------------------------
2.1 Agreement and Plan of Merger dated October 14, 1997, by the Company, Post
Acquisition Corp. and Viewlogic Systems, Inc.(1)
3.1 Fourth Amended and Restated Certificate of Incorporation(2)
3.2 Certificate of Designation of Series A Participating Preferred Stock(3)
3.3 Restated Bylaws of Synopsys, Inc.(2)
4.1 Amended and Restated Preferred Shares Rights Agreement dated November 24, 1999(3)
4.3 Specimen Common Stock Certificate(4)
10.1 Form of Indemnification Agreement(4)
10.2 Director's and Officer's Insurance and Company Reimbursement Policy(4)
10.6 Lease Agreement, dated August 17, 1990, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga Separate
Property Trust), as amended, and Richard T. Peery, Trustee, or his successor
trustee, UTA dated July 20, 1977 (Richard T. Peery Separate Property Trust),
as amended(4)
10.7 Lease Agreement, dated March 29, 1991, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property Trust), as amended, and Richard T. Peery, Trustee, or his
successor trustee, UTA dated July 20, 1977 (Richard T. Peery Separate
Property Trust), as amended(4)
10.710.15 Lease Agreement, dated March 29, 1991,June 16, 1992, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property Trust), as amended, and Richard T. Peery, Trustee, or his
successor trustee, UTA dated July 20, 1977 (Richard T. Peery Separate
Property Trust), as amended(4)
10.15amended(5)
10.16 Lease Agreement, dated June 16, 1992,23, 1993, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property Trust), as amended, and Richard T. Peery, Trustee, or his
successor trustee, UTA dated July 20, 1977 (Richard T. Peery Separate
Property Trust), as amended(5)
10.16amended(6)
10.21 Lease Agreement, dated June 23, 1993,August 24, 1995, between the Company and John Arrillaga,
Trustee, or his successor trustee, UTA dated July 20, 1977 (John Arrillaga
Separate Property
58
60
Trust), as amended, and Richard T. Peery, Trustee, or his successor trustee,
UTA dated July 20, 1977 (Richard T. Peery Separate Property Trust), as amended(6)
10.21 Lease Agreement, August 24, 1995, between the Company and
John Arrillaga, Trustee, or his successor trustee, UTA dated
July 20, 1977 (John Arrillaga Separate Property Trust), as
amended, and Richard T. Peery, Trustee, or his successor
trustee, UTA dated July 20, 1977 (Richard T. Peery Separate
Property Trust), as amended (7)amended(7)
10.25 Amendment No. 5 to Lease, dated October 4, 1995, to Lease Agreement dated August
17, 1990, between the Company and John Arrillaga, Trustee, or his successor
trustee, UTA dated July 20, 1997 (Arrillaga Family Trust), and Richard T. Peery,
Trustee, or his successor trustee, UTA dated July 20, 1997 (Richard T. Peery
Separate Property Trust), as amended(8)
10.26 Amendment No. 3 to Lease, dated October 4, 1995, to Lease Agreement dated June
16, 1992, between the Company and John Arrillaga, Trustee, or his successor
trustee, UTA dated July 20, 1997 (Arrillaga Family Trust), and Richard T. Peery,
Trustee, or his successor trustee, UTA dated July 20, 1997 (Richard T. Peery
Separate Property Trust), as amended(8)
10.27 Amendment No. 2 to Lease, dated October 4, 1995, to Lease Agreement dated June
23, 1993, between the Company and John Arrillaga, Trustee, or his successor
trustee, UTA dated July 20, 1997 (Arrillaga Family Trust), and Richard T. Peery,
Trustee, or his successor trustee, UTA dated July 20, 1997 (Richard T. Peery
Separate Property Trust), as amended(8)amended (8) Lease dated January 2, 1996 between the
Company and Tarigo-Paul, a California Limited Partnership(9)
10.29 1992 Stock Option Plan, as amended and restated(10)(11)
10.30 Employee Stock Purchase Program, as amended and restated(11)
61
EXHIBIT
NUMBER EXHIBIT DESCRIPTION
- ------- -------------------
(12)
10.31 International Employee Stock Purchase Plan, as amended and restated(11)(12)
10.32 Synopsys deferred compensation plan dated September 30, 1996(11)(12)(13)
10.33 1994 Non-Employee Directors Stock Option Plan, as amended and restated(10)(11)restated(11)(14)
10.34 Form of Executive Employment Agreement dated October 1, 1997(11)(13)(15)
10.35 Schedule of Executive Employment Agreements(13)Agreements(10)
10.36 1998 Nonstatutory Stock Option Plan(11)(14)(16)
21.1 Subsidiaries of the Company
23.1 Report on Financial Statement Schedule
23.2 Consent of KPMG LLP, Independent Auditors
24.1 Power of Attorney (see page 57)
27.1-
27.55)
27.1 Financial Data Schedules
- -------------------------
(1) Incorporated by reference to Annex A to the form of prospectus contained in
the Registration Statement on Form S-4 (File No. 333-39713) of Synopsys, Inc. as
filed with the Securities and Exchange Commission on November 7, 1997
(2) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended April 3, 1999
(3) Incorporated by reference from exhibit to Amendment No. 1 to the Company's
Registration Statement on Form 8-A as filed with the Securities and Exchange
Commission on December 13, 1999
(4) Incorporated by reference from exhibit of the same number filed with the
Company's Registration Statement on Form S-1 (File No. 33-45138) which became
effective February 24, 1992
(5) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September 30,
1992
(6) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September 30,
1993
59
61
(7) Incorporated by reference from exhibit of the same number filed with the
Company's Annual Report on Form 10-K for the fiscal year ended September 30,
1995
(8) Incorporated by reference from exhibit of the same number filed with the
Company's Quarterly Report on Form 10-Q for the quarterly period ended December
31, 1995
(9) Incorporated by reference from exhibit of the same number filed with the
Company's Quarterly Report on Form 10-Q for the quarterly period ended March 31,
1996
(10) Incorporated by reference from exhibit to the Company's Registration
StatementQuarterly Report on
Form S-8 (file No. 333-77597),10-Q for the quarterly period ended April 30, 2000, as filed with the
Securities and Exchange Commission on May 3, 1999June 13, 2000
(11) Compensatory plan or agreement in which an executive officer participates
(12) Incorporated by reference from exhibit to the Company's Registration
Statement on Form S-8 (file no. 333-38810), as filed with the Securities and
Exchange Commission on June 8, 2000
(13) Incorporated by reference from exhibit to the Registration Statement on
Form S-4 (File No. 333-21129) of Synopsys, Inc. as filed with the Securities and
Exchange Commission on February 5, 1997
(13)(14) Incorporated by reference from exhibit to the Company's Registration
Statement on Form S-8 (file No. 333-77597), as filed with the Securities and
Exchange Commission on May 3, 1999
(15) Incorporated by reference from exhibit to the Company's Quarterly Report on
Form 10-Q for the quarterly period ended January 3, 1998
(14)(16) Incorporated by reference to exhibit to the Company's Registration
Statement on Form S-8 (File No. 333-90643) as filed with the Securities and
Exchange Commission on November 9, 1999
60