613 patents
Page 12 of 31
Utility
Memory Device and Manufacturing Method Thereof
10 Jun 20
A memory device includes an insulation layer, a memory cell region and an alignment mark region are defined on the insulation layer, an interconnection structure disposed in the insulation layer, a dielectric layer disposed on the insulation layer and the interconnection structure, the dielectric layer is disposed within the memory cell region and the alignment mark region, a conductive via plug disposed on the interconnection structure within the memory cell region, the conductive via plug has a concave top surface, an alignment mark trench penetrating the dielectric layer within the alignment mark region, a bottom electrode disposed on the conductive via plug within the memory cell region and disposed in the alignment mark trench within the alignment mark region, and a magnetic tunnel junction (MTJ) structure disposed on the bottom electrode within the memory cell region and disposed in the alignment mark trench within the alignment mark region.
Kun-Ju Li, Hsin-Jung Liu, I-Ming Tseng, Chau-Chung Hou, Yu-Lung Shih, Fu-Chun Hsiao, Hui-Lin Wang, Tzu-Hsiang Hung, Chih-Yueh Li, Ang Chan, Jing-Yin Jhang
Filed: 10 Dec 18
Utility
Semiconductor Device and Method for Fabricating the Same
10 Jun 20
A method for fabricating semiconductor device includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer; performing a treatment process to rough a top surface of the first metal interconnection; and forming a carbon nanotube (CNT) junction on the first metal interconnection.
Da-Jun Lin, Bin-Siang Tsai, Chin-Chia Yang
Filed: 7 Jan 19
Utility
Self-Biased Amplifier for Use with a Low-Power Crystal Oscillator
10 Jun 20
A self-biased amplifier includes a capacitor, a bias generation circuit and a common source amplifier.
Ke-Han Chen, Min-Chia Wang
Filed: 27 Dec 18
Utility
Interconnection structure and method of forming the same
8 Jun 20
An interconnection structure and method of forming the same are disclosed.
Yu-Cheng Lin, Chich-Neng Chang, Bin-Siang Tsai
Filed: 3 Sep 18
Utility
Semiconductor device and method for fabricating the same
8 Jun 20
A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a first gate structure and a second gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; transforming the first gate structure and the second gate structure into a first metal gate and a second metal gate; forming a hard mask on the first metal gate and the second metal gate; removing part of the hard mask, the second metal gate, and part of the fin-shaped structure to form a trench; and forming a dielectric layer into the trench to form a single diffusion break (SDB) structure.
Ching-Ling Lin, Wen-An Liang, Chen-Ming Huang
Filed: 1 Jan 18
Utility
Semiconductor structure with high resistivity wafer and fabricating method of bonding the same
8 Jun 20
A semiconductor structure with a high resistivity wafer includes a device wafer.
Purakh Raj Verma, Kuo-Yuh Yang, Chia-Huei Lin
Filed: 21 Oct 18
Utility
Semiconductor Device and Method for Fabricating the Same
3 Jun 20
A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion, and a gate structure on the SDB structure.
Fu-Jung Chuang, Ching-Ling Lin, Po-Jen Chuang, Yu-Ren Wang, Wen-An Liang, Chia-Ming Kuo, Guan-Wei Huang, Yuan-Yu Chung, I-Ming Tseng
Filed: 4 Feb 20
Utility
Semiconductor Structure with Capacitor Landing Pad and Method of Make the Same
3 Jun 20
The present invention discloses a semiconductor structure with capacitor landing pad and a method for fabricating a capacitor landing pad.
Feng-Yi Chang, Fu-Che Lee, Chieh-Te Chen, Yi-Ching Chang
Filed: 2 Feb 20
Utility
Semiconductor Memory Device and Fabrication Method Thereof
3 Jun 20
The disclosure provides a semiconductor memory device including a substrate having a memory cell region and an alignment mark region; a dielectric layer covering the memory cell region and the alignment mark region; conductive vias in the dielectric layer within the memory cell region; an alignment mark trench in the dielectric layer within the alignment mark region; and storage structures disposed on the conductive vias, respectively.
Hui-Lin Wang, Chia-Chang Hsu, Chen-Yi Weng, Hung-Chan Lin, Jing-Yin Jhang, Yu-Ping Wang
Filed: 8 Dec 18
Utility
Method for forming a layout pattern
1 Jun 20
A method of forming a layout pattern is disclosed.
Ying-Chiao Wang, Yu-Cheng Tung, Li-Wei Feng, Chien-Ting Ho
Filed: 26 Mar 18
Utility
Method of forming semiconductor structure
1 Jun 20
The present invention provides a method of forming a semiconductor structure including the following steps.
Gang-Yi Lin, Feng-Yi Chang, Ying-Chih Lin, Fu-Che Lee
Filed: 2 May 18
Utility
Method of forming semiconductor memory device
1 Jun 20
A method of forming a semiconductor memory device includes following steps.
Feng-Yi Chang, Fu-Che Lee, Yi-Wang Zhan
Filed: 26 Mar 18
Utility
Semiconductor device and method of forming the same
1 Jun 20
The present invention relates to a semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure, an insulating stacked structure and a first conductive layer.
Wen-Wu Wan, Tien-Hsiang Cheng, Kun-Hsuan Chung
Filed: 29 Aug 18
Utility
Electrostatic discharge protection semiconductor device
1 Jun 20
An ESD protection semiconductor device is disclosed.
Chung-Yu Huang, Kuan-Cheng Su, Tien-Hao Tang, Ping-Jui Chen, Po-Ya Lai
Filed: 5 Sep 18
Utility
Bit line gate structure of dynamic random access memory (DRAM) and forming method thereof
1 Jun 20
A method of forming a bit line gate structure of a dynamic random access memory (DRAM) includes the following steps.
Yi-Wei Chen, Pin-Hong Chen, Tsun-Min Cheng, Chun-Chieh Chiu
Filed: 20 Feb 18
Utility
Manufacturing method of semiconductor memory device
1 Jun 20
A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode.
Tzu-Chin Wu, Wei-Hsin Liu, Yi-Wei Chen, Chia-Lung Chang, Jui-Min Lee, Po-Chun Chen, Li-Wei Feng, Ying-Chiao Wang, Wen-Chieh Lu, Chien-Ting Ho, Tsung-Ying Tsai, Kai-Ping Chen
Filed: 10 Mar 19
Utility
Method for fabricating magnetoresistive random access memory
1 Jun 20
A method for fabricating semiconductor device includes the steps of: forming an inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the IMD layer; forming a bottom electrode layer on the IMD layer; forming a cap layer on the bottom electrode layer; and removing part of the cap layer, part of the bottom electrode layer, and part of the IMD layer to form a trench.
Yi-An Shih, I-Ming Tseng, Yi-Hui Lee, Ying-Cheng Liu, Yu-Ping Wang
Filed: 20 Feb 19
Utility
Method for Fabricating Interconnect of Semiconductor Device
27 May 20
A method for fabricating interconnect of semiconductor device.
Ko-Wei Lin, Kuan-Hsiang Chen, Hsin-Fu Huang, Chun-Ling Lin, Sheng-Yi Su, Pei-Hsun Kao
Filed: 27 Nov 18
Utility
Extreme ultraviolet mask
25 May 20
An extreme ultraviolet (EUV) mask includes: a substrate having a first region and a second region; a reflective layer on the substrate; an absorbing layer on the reflective layer; and a first recess in the absorbing layer and in part of the reflective layer on the first region.
En-Chiuan Liou, Yu-Cheng Tung
Filed: 6 Apr 17
Utility
Semiconductor device and method to fabricate the semiconductor device
25 May 20
A structure of semiconductor device includes a substrate, having a dielectric layer on top.
Da-jun Lin, Bin-Siang Tsai, San-Fu Lin
Filed: 5 Dec 18