613 patents
Page 4 of 31
Utility
Three-dimensional integrated circuit and method of manufacturing the same
28 Sep 20
Provided are a three-dimensional integrated circuit (3DIC) and a method of manufacturing the same.
Chun-Hung Chen, Ming-Tse Lin
Filed: 19 Feb 19
Utility
Method of forming a stop layer filling in a space between spacers
28 Sep 20
A fabricating method of a stop layer includes providing a substrate.
Chih-Chien Liu, Tzu-Chin Wu, Po-Chun Chen, Chia-Lung Chang
Filed: 25 Sep 19
Utility
Metal interconnect structure and method for fabricating the same
21 Sep 20
A method for fabricating metal interconnect structure includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer on a substrate; forming a cap layer on the first metal interconnection; forming a second IMD layer on the cap layer; performing a first etching process to remove part of the second IMD layer for forming an opening; performing a plasma treatment process; and performing a second etching process to remove polymers from bottom of the opening.
Yi-How Chou, Tzu-Hao Fu, Tsung-Yin Hsieh, Chih-Sheng Chang, Shih-Chun Tsai, Kun-Chen Ho, Yang-Chou Lin
Filed: 17 Sep 18
Utility
Method for manufacturing semiconductor device with through silicon via structure
21 Sep 20
A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure.
Zhao-Bing Li, Ju-Bao Zhang, Chi Ren
Filed: 2 Dec 19
Utility
Integrated circuit structure with semiconductor devices and method of fabricating the same
21 Sep 20
An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate.
Wei-Lun Hsu, Yung-Chien Kung, Ming-Tsung Yeh, Yan-Hsiu Liu, Am-Tay Luy, Yao-Pi Hsu, Ji-Fu Kung
Filed: 26 Nov 19
Utility
Semiconductor device
21 Sep 20
The present invention provides a semiconductor device including a semiconductor substrate with a memory cell region and a peripheral region, a gate line in the peripheral region, an etch-stop layer covering the gate line and the semiconductor substrate, a first insulating layer covering the etch-stop layer, two contact plugs disposed on the semiconductor substrate in the peripheral region, two pads disposed on the contact plugs respectively, and a second insulating layer disposed between the pads.
Feng-Yi Chang, Fu-Che Lee, Chieh-Te Chen
Filed: 10 Feb 19
Utility
Method of manufacturing a capacitor
21 Sep 20
The present invention discloses a method of manufacturing a capacitor, which includes the steps of forming a capacitor recess in a sacrificial layer, wherein the sidewall of capacitor recess has a wave profile, forming a bottom electrode layer on the sidewall of capacitor recess, filling up the capacitor recess with a supporting layer, removing the sacrificial layer to forma capacitor pillar made up by the bottom electrode layer and the supporting layer, forming a capacitor dielectric layer on the capacitor pillar, and forming a top electrode layer on the capacitor dielectric layer.
Feng-Yi Chang, Fu-Che Lee
Filed: 11 Sep 18
Utility
Semiconductor Structure and Method for Forming the Same
16 Sep 20
A semiconductor structure is provided, the semiconductor structure includes a front oxide layer on a backside oxide layer, a front electronic component in the front oxide layer, a backside electronic component in the backside oxide layer, and a shield structure disposed between the front oxide layer and the backside oxide layer, the shield structure includes a patterned buried metal layer, two front contact structures disposed on a front surface of the patterned buried metal layer, and two back contact structures disposed on a backside of the patterned buried metal layer.
ZHIBIAO ZHOU
Filed: 30 Mar 19
Utility
Package Structure and Method of Manufacturing the Same
16 Sep 20
The present invention provides a method of manufacturing a package structure.
Chien-Li Kuo
Filed: 1 Jun 20
Utility
Semiconductor Device and Method for Fabricating the Same
16 Sep 20
A method for fabricating semiconductor device includes: forming a first semiconductor layer and an insulating layer on a substrate; removing the insulating layer and the first semiconductor layer to form openings; forming a second semiconductor layer in the openings; and patterning the second semiconductor layer, the insulating layer, and the first semiconductor layer to form fin-shaped structures.
Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chia-Jung Hsu, Yu-Hsiang Lin
Filed: 8 Apr 19
Utility
Semiconductor Structure and Process Thereof
16 Sep 20
A semiconductor structure includes at least one stacked fin structure, a gate and a source/drain.
Zhi-Cheng Lee, Wei-Jen Chen, Kai-Lin Lee
Filed: 21 Mar 19
Utility
Manufacturing Method of Semiconductor Device
16 Sep 20
A manufacturing method of a semiconductor device includes the following steps.
Chen-Yi Weng, Jing-Yin Jhang, Hui-Lin Wang, Chin-Yang Hsieh
Filed: 26 May 20
Utility
Manufacture parameters grouping and analyzing method, and manufacture parameters grouping and analyzing system
14 Sep 20
A manufacture parameters grouping and analyzing method, and a manufacture parameters grouping and analyzing system are provided.
Li-Chin Wang, Ya-Ching Cheng, Chien-Hung Chen, Chun-Liang Hou, Da-Ching Liao
Filed: 21 Nov 17
Utility
Static random access memory
14 Sep 20
An SRAM cell includes two inverters and three transistors.
Zih-Yu Chiu, Hsin-Wen Chen, Ya-Nan Mou, Yuan-Hui Chen, Chung-Cheng Tsai
Filed: 15 Oct 19
Utility
Etching back method
14 Sep 20
A material layer having recesses is formed on a substrate including a high pattern density area and a low pattern density area.
Kuan-Ying Lai, Chang-Mao Wang, Hsin-Yu Hsieh
Filed: 25 Feb 19
Utility
Semiconductor device
14 Sep 20
A semiconductor device includes a substrate including a plurality of chip areas and a scribe line defined thereon, and a mark pattern disposed in the scribe line.
Chih-Kai Kang, Sheng-Yuan Hsueh, Yi-Chung Sheng, Kuo-Yu Liao, Shu-Hung Yu, Hung-Hsu Lin, Hsiang-Hung Peng
Filed: 8 Nov 16
Utility
Semiconductor device and method for fabricating the same
14 Sep 20
A semiconductor device includes a semiconductor substrate, semiconductor fins; and a first fin bump between the semiconductor fins.
En-Chiuan Liou, Yu-Cheng Tung
Filed: 30 Sep 18
Utility
Semiconductor memory device and manufacturing method thereof
14 Sep 20
A semiconductor memory device includes a semiconductor substrate, bit line structures, storage node contacts, isolation structures, a first spacer, a second spacer, and a third spacer.
Po-Han Wu, Feng-Yi Chang, Fu-Che Lee, Wen-Chieh Lu
Filed: 21 Mar 19
Utility
Metal gate transistor with a stacked double sidewall spacer structure
14 Sep 20
A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a spacer around the gate structure; forming a first contact etch stop layer (CESL) around the spacer; forming a mask layer on the first CESL; removing part of the mask layer; removing part of the first CESL; forming a second CESL on the mask layer and the gate structure; and removing part of the second CESL.
Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang, Chun-Jen Huang
Filed: 19 Sep 17
Utility
MEMS structure and method of fabricating the same
14 Sep 20
A method of fabricating a MEMS structure includes providing a substrate comprising a logic element region and a MEMS region.
Meng-Jia Lin, Yung-Hsiao Lee, Weng-Yi Chen, Shih-Wei Li, Chung-Hsien Liu
Filed: 6 Sep 17