28912 patents
Page 10 of 1446
Utility
Semiconductor Device and Method of Forming the Same
11 Jan 24
A semiconductor device and a method of forming the same are provided.
Yung-Sheng Lin, Cheng-Lung Yang, Chin-Yu Ku, Ming-Da Cheng, Wen-Hsiung Lu, Tang-Wei Huang, Fu Wei Liu
Filed: 22 Sep 23
Utility
Thermal Structure for Semiconductor Device and Method of Forming the Same
11 Jan 24
A semiconductor device includes an integrated circuit structure and a thermal pillar over the integrated circuit structure.
Wei-Ming Wang, Yu-Hung Lin, Shih-Peng Tai, Kuo-Chung Yee
Filed: 11 Jul 22
Utility
Package Structure and Method of Fabricating the Same
11 Jan 24
A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures.
Yu-Sheng Lin, Han-Hsiang Huang, Chien-Sheng Chen, Shu-Shen Yeh, Shin-Puu Jeng
Filed: 22 Sep 23
Utility
Semiconductor Package and Method
11 Jan 24
A semiconductor package including a thermally conductive bridge and a method of forming are provided.
Ming-Fa Chen
Filed: 7 Jul 22
Utility
Capacitor and Method for Forming the Same
11 Jan 24
An integrated circuit (IC) structure includes a semiconductor substrate, a bottom electrode routing, a capacitor structure, a top electrode routing.
Wan-Te CHEN, Chung-Hui CHEN, Wei Chih CHEN
Filed: 22 Sep 23
Utility
Coplanar Control for Film-type Thermal Interface
11 Jan 24
A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature.
Yu-Hsun Wang, Ping-Yin Hsieh, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
Filed: 7 Aug 23
Utility
Interconnect Structures of Semiconductor Device and Methods of Forming the Same
11 Jan 24
A method of an interconnect structure includes the following steps.
Chia-Cheng Chou, Chung-Chi Ko, Tze-Liang Lee
Filed: 26 Sep 23
Utility
Analog-cells-boundary Region with Buried Power Grid Segment, Semiconductor Device Including Same and Method of Manufacturing Same
11 Jan 24
A semiconductor device includes: first and second active regions (ARs) included correspondingly in abutting first and second analog cell regions, a region where the first and second analog cell regions abut (analog-cell-boundary (ACB) region) extending from about a top boundary of the first AR to about a bottom boundary of the second AR; via-to-PGBM_1st-segment contact structures (VBs) correspondingly being under the first or second ARs, a long axis of each VB and a short axis of each of the first and second ARs having about a same length; and a PG segment in a first buried metallization layer (PGBM_1st segment) under the VBs, the PGBM_1st segment underlapping a majority of each of the VBs, and a Y-midline of the PGBM_1st segment being at or proximal to where the first and second analog cell regions abut and thus being at or proximal to a middle of the ACB region.
Ming-Cheng SYU, Yu-Tao YANG, Chung-Ting LU, Po-Zeng KANG, Amit KUNDU, Wen-Shen CHOU, Yung-Chow PENG
Filed: 23 Jan 23
Utility
Package Structure and Manufacturing Method Thereof
11 Jan 24
A package structure has a first die, a second die, the third die, a molding compound, a first redistribution layer, an antenna and conductive elements.
Chen-Hua Yu, Kuo-Chung Yee
Filed: 26 Sep 23
Utility
Semiconductor Device, Package Structure and Method of Fabricating the Same
11 Jan 24
A package structure includes a semiconductor die, a first insulating encapsulant, a plurality of first conductive features, an interconnect structure and bump structures.
Tsung-Fu Tsai, Ying-Ching Shih, Szu-Wei Lu
Filed: 21 Sep 23
Utility
Interface for a Semiconductor Chip with Adaptive Via Region Arrangement and Semiconductor Device with Stacked Semiconductor Chips
11 Jan 24
An interface for a semiconductor chip provided herein includes bonds.
Yung-Chih Chen, Kun-Ti Lee, Chih-Kang Chiu, Igor Elkanovich
Filed: 5 Jul 22
Utility
Vertically Mounted Die Groups
11 Jan 24
A method of fabricating a semiconductor package includes: providing a first die group including a plurality of first dies stacked parallel to a front surface of the first die group; providing a second die group including a plurality of second dies parallel to a front surface of the second die group; providing a base substrate structure comprising a substrate characterized by a lattice crystalline plane extending in a third direction; bonding the first die group on the base substrate structure, wherein the first edge extends in a first direction, and the first direction and the third direction define a first angle; and bonding the second die group on the base substrate structure, wherein the second edge extends in a second direction, and the second direction and the third direction define a second angle, and at least one of the first angle and the second angle is not zero.
Jen-Yuan Chang
Filed: 24 Sep 23
Utility
Semiconductor Package and Method of Manufacturing the Same
11 Jan 24
A semiconductor package includes a semiconductor die, a redistribution circuit structure, a supporting structure and a protective layer.
Chia-Kuei Hsu, Feng-Cheng Hsu, Ming-Chih Yew, Po-Yao Lin, Shuo-Mao Chen, Shin-Puu Jeng
Filed: 21 Sep 23
Utility
3D Semiconductor Structure for Wide-bandgap Semiconductor Devices
11 Jan 24
Various embodiments of the present disclosure are directed towards a three-dimensional (3D) semiconductor structure for wide-bandgap semiconductor devices in which the wide-bandgap semiconductor devices are split amongst a first IC die and a second IC die.
Ting-Fu Chang, Jiun-Lei Yu, Man-Ho Kwan, Chun-Lin Tsai
Filed: 4 Jan 23
Utility
Semiconductor Structure
11 Jan 24
A semiconductor structure includes a first die and a plurality of first dummy pads.
Hsien-Wei Chen, Jie Chen, Ming-Fa Chen, Ching-Jung Yang
Filed: 22 Sep 23
Utility
Package Structure
11 Jan 24
A package structure includes a first semiconductor package and a second semiconductor package over the first semiconductor package.
Jing-Cheng LIN, Po-Hao TSAI
Filed: 25 Sep 23
Utility
Semiconductor Package
11 Jan 24
A semiconductor package includes a first die including an optical coupler, a second die disposed on the first die, and a transparent encapsulation material disposed on the first die.
Jie Chen, Hsien-Wei Chen, Ming-Fa Chen
Filed: 22 Sep 23
Utility
Semiconductor Device and Method for Generating Integrated Circuit Layout
11 Jan 24
The present disclosure provides methods for generating an integrated circuit (IC) layout and a semiconductor device.
KUAN-JUNG JHU, CHUN-CHENG KU
Filed: 7 Jul 22
Utility
Integrated Circuit
11 Jan 24
An integrated circuit includes a first transistor of a first conductivity type including a first active area extending in a first direction; a second transistor of the first conductivity type including at least two second active areas extending in the first direction and a first gate stripe crossing the at least two second active areas; and a third transistor of a second conductivity type that is stacked on the second transistor and includes at least two third active areas arranged above the at least two second active areas.
Jian-Sing LI, Guo-Huei WU, Hui-Zhong ZHUANG, Chih-Liang CHEN, Li-Chun TIEN
Filed: 22 Sep 23
Utility
Photosensor Having Gate-all-around Structure and Method for Forming the Photosensor
11 Jan 24
A photosensor includes a substrate, a photo-detecting column, a gate structure, a floating node structure and a channel structure.
P.C. CHANG, Ping-Hao LIN, Kuo-Cheng LEE
Filed: 25 Sep 23