28912 patents
Page 9 of 1446
Utility
System and Methods for Piplined Heterogeneous Dataflow for Artificial Intelligence Accelerators
11 Jan 24
Systems and methods for a pipelined heterogeneous dataflow for an artificial intelligence accelerator are disclosed.
Xiaoyu Sun, Kerem Akarvardar
Filed: 7 Jul 22
Utility
System on Chip (SOC) Current Profile Model for Integrated Voltage Regulator (IVR) Co-design
11 Jan 24
A method includes: extracting a first current profile model corresponding to a System on Chip (SOC) at a first design stage of the SOC; determining that a first design data of an Integrated Voltage Regulator (IVR) and the SOC pass a first co-simulation based on the extracted first current profile model; extracting a second current profile model corresponding to the SOC at a second design stage of the SOC, the second design stage being subsequent to the first design stage; refining the first design data of the IVR to generate a second design data of the IVR; determining that the second design data of the IVR and the SOC pass a second co-simulation based on the extracted second current profile model.
Haohua Zhou, Tze-Chiang Huang, Mei Hsu Wong
Filed: 5 Jun 23
Utility
System and Method of Convolutional Neural Network
11 Jan 24
A method includes: generating, by a processing device, at least one first output image block based on a first image block group; storing stored image blocks corresponding to a first part of the first image block group in the processing device; and after the at least one first output image block is generated, generating, by the processing device, at least one second output image block based on a first image block and the stored image blocks, wherein the first image block group and the first image block are arranged in order along a first direction, and the at least one first output image block and the at least one second output image block are arranged in order along the first direction.
Chao-Tsung HUANG, Kai-Ping LIN
Filed: 8 Jul 22
Utility
Method and System for Determining Equivalence of Design Rule Manual Data and Design Rule Checking Data
11 Jan 24
The present disclosure provides a method and a system for determining the equivalence of the DRM data set and the DRC data set.
CHIN-CHOU LIU, YI-KUANG LEE, LIE-SZU JUANG
Filed: 23 Sep 23
Utility
Semiconductor Processing Apparatus for Generating Plasma
11 Jan 24
A Faraday shield, a semiconductor processing apparatus, and an etching apparatus are provided.
Chien-Hsiang Chen, Ching-Horng Chen, Yen-Ji Chen, Cheng-Yi Huang, Chih-Shen Yang
Filed: 22 Sep 23
Utility
Logic Cell Structures and Related Methods
11 Jan 24
A method of forming an integrated circuit structure is provided.
KUMAR LALGUDI, RANJITH KUMAR, MOHAMMED RABIUL ISLAM, JIANYANG XU
Filed: 22 Sep 23
Utility
Semiconductor Device and Method of Forming the Same
11 Jan 24
A method of forming a semiconductor device includes the following operations.
Chi-Chang Liu
Filed: 22 Sep 23
Utility
Computation In Memory for Anneal Processing Using Bitwise Capacitive Coupling
11 Jan 24
An annealing processor utilizes capacitive spin update circuits to generate values for determining if spin states should be updated.
Yu-Der CHIH, Chun-Yen YAO
Filed: 11 Jul 22
Utility
Semiconductor Device and Method for Forming the Same
11 Jan 24
A semiconductor structure includes a semiconductor substrate, a gate structure, a source/drain structure, a contact, a dielectric layer, and a metal line.
Jian-Zhi HUANG, Yun-Hsuan HSU, I-Chih NI, Chih-I WU
Filed: 21 Sep 23
Utility
Memory Device Having Bitline Segmented into Bitline Segments and Related Method for Operating Memory Device
11 Jan 24
A memory device includes a plurality of circuit layers, a plurality of first conductive through via structures and a plurality of bitlines.
SHIH-LIEN LINUS LU, FONG-YUAN CHANG, YI-CHUN SHIH
Filed: 22 Sep 23
Utility
Semiconductor Device and Method of Manufacture
11 Jan 24
A semiconductor device includes a fin, first source/drain regions, second source/drain regions, a first nanosheet, a second nanosheet and a metal gate structure.
Meng-Yu Lin, Chun-Fu Cheng, Cheng-Yin Wang, Yi-Bo Liao, Szuya Liao
Filed: 10 Jul 22
Utility
Deposition Apparatus, Deposition Target Structure, and Method
11 Jan 24
A deposition apparatus includes a process chamber, a wafer support in the process chamber, a backplane structure having a first surface in the process chamber facing the wafer support, a target having a second surface facing the first surface and a third surface facing the wafer support, and an adhesion structure in physical contact with the backplane structure and the target.
Chia-Hsi WANG, Yen-Yu CHEN
Filed: 22 Sep 23
Utility
Semiconductor Devices and Methods of Manufacturing Thereof
11 Jan 24
A method of fabricating a semiconductor device is described.
Chia-Ling Chung, Chun-Chih Cheng, Shun-Wu Lin, Ming-Hsi Yeh, Kuo-Bin Huang
Filed: 10 Aug 23
Utility
Method of Removing a By-product from a Component of a Semiconductor Apparatus
11 Jan 24
A method of removing a nitride-containing by-product from a component of a semiconductor apparatus includes heating the component to a predetermined temperature for a predetermined duration, wherein the nitride-containing by-product is transformed into an oxide-containing or oxynitride-containing product by the heating; and removing the oxide-containing or oxynitride-containing product with an acid solution.
REN-GUAN DUAN, CHEN-HSIANG LU, CHIN-FENG LIN, TUNG-HSIUNG LIU
Filed: 7 Jul 22
Utility
Semiconductor Devices and Methods of Manufacturing Thereof
11 Jan 24
A method of fabricating a semiconductor device is described.
Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Chia-Hao Yu, Hsiao Wen Lee
Filed: 9 Aug 23
Utility
Semiconductor Structure Having Reliable Line Pattern Designs and Method of Manufacturing the Same
11 Jan 24
The present disclosure provides a semiconductor structure and a method of manufacturing a semiconductor structure.
LIANG-SHIUAN PENG, CHIH-HUNG LU
Filed: 7 Jul 22
Utility
Semiconductor Device and Manufacturing Method Thereof
11 Jan 24
A method for manufacturing a semiconductor device is provided.
Ta-Chun LIN, Ming-Che CHEN, Jyun-Yang SHEN, Yu-Chang LIANG, Chun-Jun LIN, Kuo-Hua PAN, Jhon Jhy LIAW
Filed: 7 Jul 22
Utility
Semiconductor Device Structure with Gate Stack and Method for Forming the Same
11 Jan 24
A method for forming a semiconductor device structure is provided.
Huan-Chieh SU, Chun-Yuan CHEN, Lin-Yu HUANG, Chih-Hao WANG
Filed: 5 Jul 22
Utility
Package Structure with Photonic Die and Method
11 Jan 24
Provided is a package structure including a bottom die, a top die, an insulating layer, a circuit substrate, a dam structure, and an underfill.
Hsien-Wei Chen, Ming-Fa Chen, Ying-Ju Chen
Filed: 22 Sep 23
Utility
Gate Isolation Regions and Fin Isolation Regions and Method Forming the Same
11 Jan 24
A method includes forming a gate stack on a semiconductor region, etching the gate stack to form a first trench separating the gate stack into a first gate stack portion and a second gate stack portion, and forming a gate isolation region filling the first trench.
Bo-Cyuan Lu, Hsin-Che Chiang, Tai-Chun Huang, Chi On Chui
Filed: 5 Jan 23