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Western Digital (WDC)

3062 patents

Page 3 of 154
Utility
Restriction of Suspension Dimple Contact Point
5 May 22
A head gimbal assembly (HGA) for a hard disk drive includes a primary dimple having a secondary structure protruding from the primary dimple, where a flexure is movably coupled with a load beam via the primary dimple, and where the secondary structure is configured to restrict the point of contact between the load beam and the flexure.
Yoshinobu Noguchi, Tsuyoshi Matsumoto, Hiroyasu Tsuchida, Tomoyuki Sasaki
Filed: 12 Feb 21
Utility
Heat-assisted Magnetic Recording (Hamr) Medium with Multilayered Underlayer for the Recording Layer
5 May 22
A heat-assisted magnetic recording (HAMR) medium has a multilayered underlayer between the heat-sink layer and the recording layer.
Hoan Cong Ho, Paul Christopher Dorsey, Tomoko Seki
Filed: 9 Feb 21
Utility
Spin-transfer Torque Magnetoresistive Memory Device with a Free Layer Stack Including Multiple Spacers and Methods of Making the Same
5 May 22
A spin-transfer torque (STT) magnetoresistive memory device includes a first electrode, a second electrode, and a magnetic tunnel junction located between the first electrode and the second electrode.
Tiffany SANTOS, Neil SMITH
Filed: 14 Jan 22
Utility
Three-dimensional Memory Device Containing a Shared Word Line Driver Across Different Tiers and Methods for Making the Same
5 May 22
A semiconductor structure includes a peripheral circuit, a first three-dimensional memory array overlying the peripheral circuit and including a first alternating stack of first insulating layers and first electrically conductive layers containing first word lines and first select lines, and first memory stack structures vertically extending through the first alternating stack, and a second three-dimensional memory array overlying the first three-dimensional memory array and including a second alternating stack of second insulating layers and second electrically conductive layers containing second word lines and second select lines, and second memory stack structures vertically extending through the second alternating stack.
Hiroyuki OGAWA, Ken OOWADA, Mitsuteru MUSHIGA
Filed: 5 Nov 20
Utility
QLC Data Programming
5 May 22
The present disclosure generally relates to improving programming to data storage devices, such as solid state drives (SSDs).
Sergey Anatolievich GOROBETS, Alan D. BENNETT, Liam PARKER, Yuval SHOHET, Michelle MARTIN
Filed: 22 Feb 21
Utility
Multi-wafer Deposition Tool for Reducing Residual Deposition on Transfer Blades and Methods of Operating the Same
5 May 22
A multi-wafer deposition tool includes a vacuum enclosure including a platen laterally surrounding multiple wafer stages, a spindle-blade assembly including a spindle and multiple transfer blades attached to the spindle, and a controller configured to transfer wafers between the multiple wafer stages through rotation of the multiple transfer blades around a rotation axis pasting through the spindle.
Makoto TSUTSUE, Shunsuke TAKUMA
Filed: 5 Nov 20
Utility
Three-dimensional Memory Device Containing a Shared Word Line Driver Across Different Tiers and Methods for Making the Same
5 May 22
A semiconductor structure includes a peripheral circuit, a first three-dimensional memory array overlying the peripheral circuit and including a first alternating stack of first insulating layers and first electrically conductive layers containing first word lines and first select lines, and first memory stack structures vertically extending through the first alternating stack, and a second three-dimensional memory array overlying the first three-dimensional memory array and including a second alternating stack of second insulating layers and second electrically conductive layers containing second word lines and second select lines, and second memory stack structures vertically extending through the second alternating stack.
Hiroyuki OGAWA, Ken OOWADA, Mitsuteru MUSHIGA
Filed: 5 Nov 20
Utility
Three-dimensional Memory Device Containing Composite Word Lines Containing Metal and Silicide and Method of Making Thereof
5 May 22
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate.
Rahul SHARANGPANI, Raghuveer S. MAKALA, Fei ZHOU, Adarsh RAJASHEKHAR
Filed: 30 Oct 20
Utility
Three-dimensional Memory Device Containing Ferroelectric-assisted Memory Elements and Method of Making the Same
5 May 22
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical stack of charge storage elements, a vertical semiconductor channel, a ferroelectric material layer located between the vertical stack of charge storage elements and the vertical semiconductor channel, and a blocking dielectric layer located between the ferroelectric material layer and the vertical semiconductor channel.
Ramy Nashed Bassely SAID, Adarsh RAJASHEKHAR, Senaka KANAKAMEDALA, Raghuveer S. MAKALA
Filed: 19 Jan 22
Utility
Transferring computational operations to controllers of data storage devices
3 May 22
Systems and methods for offloading computational operations.
Eswaran Subramaniam, Sathyanarayanan Subramanian, Jatin Gaur
Filed: 31 Oct 18
Utility
Adaptive folding for integrated memory assembly
3 May 22
A non-volatile storage system includes a memory controller connected to an integrated memory assembly.
Eran Sharon, Alex Bazarsky, Idan Alrod
Filed: 9 May 20
Utility
Persistent version control for data transfer between heterogeneous data stores
3 May 22
Example distributed storage systems, version control managers, and methods provide persistent version control for data transfers between heterogeneous data stores.
Tomy Ammuthan Cheru, Muhammad Tanweer Alam, Vibhor Arunkumar Patale
Filed: 22 Mar 19
Utility
Enhanced multistate verify techniques in a memory device
3 May 22
A method comprises determining a verify voltage for a next iteration of a verify operation to be performed on memory cells a first set of memory cells of a selected word line, and determining data states for a second set of memory cells of at least one neighboring word line.
Muhammad Masuduzzaman, Deepanshu Dutta
Filed: 12 Jun 20
Utility
Three-dimensional memory device with dielectric wall support structures and method of forming the same
3 May 22
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located between line trenches, a first memory array region and a second memory array region, and a pair of dielectric wall structures located between the first line trench and the second line trench and between the memory array regions.
Tomohiro Kubo
Filed: 30 Sep 20
Utility
Semiconductor die containing dummy metallic pads and methods of forming the same
3 May 22
A first semiconductor die includes first semiconductor devices located over a first substrate, first interconnect-level dielectric layers embedding first metal interconnect structures and located over the first semiconductor devices, a first pad-level dielectric layer embedding first bonding pads and located over the first interconnect-level dielectric layers, and first edge seal structures laterally surrounding the first semiconductor devices.
Teruo Okina
Filed: 20 May 20
Utility
Three-dimensional memory device containing a shared word line driver across different tiers and methods for making the same
3 May 22
A semiconductor structure includes a peripheral circuit, a first three-dimensional memory array overlying the peripheral circuit and including a first alternating stack of first insulating layers and first electrically conductive layers containing first word lines and first select lines, and first memory stack structures vertically extending through the first alternating stack, and a second three-dimensional memory array overlying the first three-dimensional memory array and including a second alternating stack of second insulating layers and second electrically conductive layers containing second word lines and second select lines, and second memory stack structures vertically extending through the second alternating stack.
Hiroyuki Ogawa, Ken Oowada, Mitsuteru Mushiga
Filed: 5 Nov 20
Utility
Three-dimensional memory device including a silicon-germanium source contact layer and method of making the same
3 May 22
A memory device includes a silicon-germanium source contact layer, an alternating stack of insulating layers and electrically conductive layers located over the silicon-germanium source contact layer, and a memory stack structure vertically extending through the alternating stack.
Ashish Baraskar, Raghuveer S. Makala, Peter Rabkin
Filed: 24 Aug 20
Utility
Gate material-based capacitor and resistor structures and methods of forming the same
3 May 22
At least one of a capacitor or a resistor structure can be formed concurrently with formation of a field effect transistor by patterning a gate dielectric layer into gate dielectric and into a first node dielectric or a first resistor isolation dielectric, and by patterning a semiconductor layer into a gate electrode and into a second electrode of a capacitor or a resistor strip.
Hokuto Kodate, Hiroyuki Ogawa, Dai Iwata, Mitsuhiro Togo
Filed: 28 Aug 20
Utility
Efficient Data Storage Usage Associated With Ungraceful Shutdown
28 Apr 22
The present disclosure generally relates to efficient block usage after ungraceful shutdown (UGSD) events.
Nian Niles YANG, Sahil SHARMA, Judah Gamliel HAHN
Filed: 24 Feb 21
Utility
Soft Data Compression For Non-Volatile Memory
28 Apr 22
An encoder of a storage medium receives, at a plurality of latches respectively associated with a plurality of memory cells, soft data corresponding to data subject to a read operation specified by the a storage controller, compresses the soft data, and stores the compressed soft data in a buffer before transmitting the compressed soft data to the storage controller.
A Harihara Sravan, Yan Li, Feng Lu
Filed: 28 Jun 21
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