5344 patents
Page 3 of 268
Utility
Data Storage Device and Method for Adaptive Host Memory Buffer Allocation Based on Virtual Function Prioritization
4 Jan 24
A data storage device and method for adaptive host memory buffer allocation based on virtual function prioritization are provided.
Shay Benisty, Judah Gamliel Hahn, Ariel Navon, Alexander Bazarsky
Filed: 30 Jun 22
Utility
Three-dimensional Memory Device Containing Templated Crystalline Ferroelectric Memory Elements and Method of Making Thereof
4 Jan 24
A ferroelectric memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening extending vertically through the alternating stack and including laterally-protruding portions at levels of the electrically conductive layers, and a memory opening fill structure located in the memory opening and containing a vertical semiconductor channel and a vertical stack of discrete ferroelectric memory structures located in the laterally-protruding portions of the memory opening.
Kartik SONDHI, Adarsh RAJASHEKHAR, Fei ZHOU, Raghuveer S. MAKALA
Filed: 29 Jun 22
Utility
Performance Indicator on a Data Storage Device
4 Jan 24
A data storage device comprising a non-volatile storage medium configured to store user data, a data port configured to transmit data between a host computer system and the data storage device, a display system, and a controller.
Ramanathan MUTHIAH
Filed: 29 Jun 22
Utility
Alternating-bias Signal Resistance Detection for Resistive Temperature Detectors In Disk Drives
4 Jan 24
Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector (RTD) having a first resistance electrically connected to a first amplifier and a plurality of controlled current sources and switches, and one or more processing devices configured to: control the switches to generate an alternating-bias signal having a first clock frequency for biasing the first resistance, modulate an input signal of the first amplifier using the first clock frequency to generate a modulated signal, demodulate an amplified modulated signal at an output of a second amplifier using the first clock frequency to generate a resistance detection signal, the second amplifier coupled to the first amplifier, and process the resistance detection signal to determine the first resistance and/or a change in value of the first resistance.
John Contreras, Joey M. Poss, Ronald Chang, Bernhard E. Knigge
Filed: 9 Aug 22
Utility
Automatic Data Erase from Data Storage Device
4 Jan 24
A data storage device comprising a non-volatile storage medium configured to store user data, a data port configured to receive and transmit data between a host computer system and the data storage device, and a controller.
Eyal HAMO, Sagi TARAGAN, Alexander LEMBERG
Filed: 29 Jun 22
Utility
Just-In-Time Re-Partitioning of Feature Maps for Efficient Balancing of Compute Core Workloads
4 Jan 24
Certain aspects of the present disclosure provide techniques for partitioning feature maps to improve machine learning model processing.
Kiran Kumar GUNNAM, Vikram Varadarajan KALKUNTE, Matheus Almeida OGLEARI, Anand KULKARNI, Zvonimir Z. BANDIC
Filed: 30 Jun 22
Utility
Multilayer Structures For Magnetic Recording Devices To Facilitate Targeted Magnetic Switching and Low Coercivity
4 Jan 24
Aspects of the present disclosure generally relate to magnetic recording heads (such as write heads of data storage devices) that include multilayer structures to facilitate targeted switching and relatively low coercivity.
Ning SHI, Brian R. YORK, Susumu OKAMURA, Suping SONG
Filed: 30 Jun 22
Utility
Failed Temperature Sensor Detection and Mitigation Within Data Storage Devices
4 Jan 24
Methods and apparatus for detecting a failed temperature sensor within a data storage device and for mitigating the loss of the sensor are provided.
Hedan Zhang, Chaolun Zheng, Ning Ye, Bret Dee Winkler, Yanjun Xia, Wei Wu
Filed: 29 Jun 22
Utility
Doped BiSb (012) or Undoped BiSb (001) Topological Insulator with GeNiFe Buffer Layer and/or Interlayer for SOT Based Sensor, Memory, and Storage Devices
4 Jan 24
The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer.
Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Susumu OKAMURA, Kuok San HO, Hisashi TAKANO, Randy G. SIMMONS
Filed: 30 Jun 22
Utility
Fault Tolerance and Coherence for Shared Memory
4 Jan 24
A system includes at least one memory controller that partitions at least one memory into a plurality of nodes.
Dejan Vucinic, Jaco Hofmann, Paul Loewenstein, Huynh Tu Dang, Marjan Radi
Filed: 29 Jun 22
Utility
Non-volatile Memory with Suspension Period During Programming
4 Jan 24
To remedy short term data retention issues, a system creates a gate to channel voltage differential for non-volatile memory cells between programming and verifying in order to accelerate the effects of the short term data retention issue.
Yi Song, Jiacen Guo, Jiahui Yuan
Filed: 29 Jun 22
Utility
Data Storage Device with Flexible Logical Tracks and Radius-independent Data Rate
4 Jan 24
Various illustrative aspects are directed to a data storage device, comprising one or more disks; at least one actuator mechanism configured to position at least a first head proximate to a first disk surface and a second head proximate to a second disk surface; and one or more processing devices.
David R. Hall
Filed: 30 Jun 22
Utility
Storage System and Method for Proactive Die Retirement by Fatal Wordline Leakage Detection
4 Jan 24
In some situations, a leak on a wordline may be a localized problem that causes data loss in a block that contains the wordline.
Xuan Tian, Liang Li, Dandan Yi, Jojo Xing, Vincent Yin, Yongke Sun, Alan Bennett
Filed: 1 Jul 22
Utility
Continuous Dual Path Resistance Detection for Resistive Temperature Detectors In Disk Drives
4 Jan 24
Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector with a first resistance, a resistance detection circuit electrically coupled to the first resistance and comprising a low and high frequency path corresponding to a DC and AC mode, respectively, and one or more processing devices configured to: bias the first resistance with a voltage bias, where the first resistance is coupled to a first and second amplifier, control a pulse generator to add a bias pulse on the HF path to generate a HF resistance detection signal, where the second amplifier is biased using the voltage bias and the bias pulse, control a clock to chop a LF signal at the first amplifier on the LF path, demodulate the chopped LF signal to generate a LF resistance detection signal, and concurrently process the HF and LF resistance detection signals.
John Contreras, Joey M. Poss, Ronald Chang, Bernhard E. Knigge
Filed: 9 Aug 22
Utility
Highly Textured 001 BiSb And Materials for Making Same
4 Jan 24
The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation.
Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
Filed: 30 Jun 22
Utility
Offset Spiral Data Track Format for Data Storage Devices
4 Jan 24
Example control circuitry, data storage devices, and methods to provide a spiral data track format that is different from the underlying servo track format are described.
Weldon M. Hanson, Richard Galbraith, Iouri Oboukhov, Niranjay Ravindran, Derrick Burton
Filed: 29 Jun 22
Utility
Three-dimensional Memory Device with High Contact Via Density and Methods of Forming the Same
4 Jan 24
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a first three-dimensional memory array located in a first memory array region, and a second three-dimensional memory array located in a second memory array region that is laterally spaced from the first memory array region along a first horizontal direction by an inter-array region.
Hirofumi TOKITA, Tomohiro KUBO, Shiqian SHAO, Fumiaki TOYAMA
Filed: 30 Jun 22
Utility
Three-dimensional Memory Device with High Contact Via Density and Methods of Forming the Same
4 Jan 24
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a first three-dimensional memory array located in a first memory array region, and a second three-dimensional memory array located in a second memory array region that is laterally spaced from the first memory array region along a first horizontal direction by an inter-array region.
Tomohiro KUBO, Hirofumi TOKITA, Shiqian SHAO, Fumiaki TOYAMA
Filed: 30 Jun 22
Utility
Memory matched low density parity check coding schemes
2 Jan 24
Low-density parity-check (LDPC) coding based on memory cell voltage distribution (CVD) in data storage devices.
Eran Sharon, Ran Zamir, David Avraham, Idan Alrod
Filed: 8 Dec 21
Utility
TLC data programming with hybrid parity
2 Jan 24
The present disclosure generally relates to improving programming to data storage devices, such as solid state drives (SSDs).
Sergey Anatolievich Gorobets, Alan D. Bennett, Liam Parker, Yuval Shohet, Michelle Martin
Filed: 15 Mar 21