5344 patents
Page 9 of 268
Utility
Resource Allocation In Virtualized Environments
14 Dec 23
A node includes a shared memory for a distributed memory system.
Marjan Radi, Dejan Vucinic
Filed: 9 Jun 22
Utility
Array Dependent Voltage Compensation In a Memory Device
14 Dec 23
The memory device that includes a die with a CMOS wafer with programming and erasing circuitry.
Ke Zhang, Liang Li, Ming Wang
Filed: 10 Jun 22
Utility
Peer Storage Device Messaging for Vulnerability Management
14 Dec 23
Systems and methods for peer data storage device messaging over a peer channel, such as a control bus, for vulnerability management are disclosed.
Eran Moshe, Danny Berler, Saifullah Nalatwad
Filed: 14 Jun 22
Utility
Read Techniques to Reduce Read Errors In a Memory Device
14 Dec 23
The memory device includes a memory block with a plurality of memory cells, which are programmed to multiple bits per memory cell, arranged in a plurality of word lines.
Jiacen Guo, Xiang Yang
Filed: 10 Jun 22
Utility
Data Storage Device with Split Burst Servo Pattern
14 Dec 23
Various illustrative aspects are directed to a data storage device, comprising: one or more disks; an actuating mechanism comprising one or more heads, and configured to position the one or more heads proximate to disk surfaces of the one or more disks; and one or more processing devices.
Kei Yasuna, Guoxiao Guo, Ichiro Yokokawa
Filed: 13 Jun 22
Utility
High Speed Toggle Mode Transmitter with Capacitive Boosting
14 Dec 23
An interface circuit that can operate in toggle mode at data high transfer rates while reducing the self-induced noise is presented.
Nitin Gupta, Shiv Harit Mathur, Ramakrishnan Subramanian, Dmitry Vaysman
Filed: 8 Jun 22
Utility
Techniques for Determining Last Programmed Wordline
14 Dec 23
Embodiments of the present disclosure generally include methods of specially programming a set of memory cells, wherein each specially programmed memory cell is specially programmed along with programming a plurality of wordlines, and wherein each memory cell is specially programmed by altering a bitline and gate voltage applied to the memory cell.
KIRUBAKARAN PERIYANNAN, DANIEL J. LINNEN, JAYAVEL PACHAMUTHU
Filed: 8 Jun 22
Utility
Open Block Boundary Group Programming for Non-volatile Memory
14 Dec 23
Technology is disclosed herein for open block boundary group programming of non-volatile memory such as NAND.
Ke Zhang, Ming Wang, Liang Li
Filed: 10 Jun 22
Utility
State Look Ahead Quick Pass Write Algorithm to Tighten Ongoing Natural Threshold Voltage of Upcoming States for Program Time Reduction
14 Dec 23
A memory apparatus and method of operation are provided.
Ke Zhang, Ming Wang, Liang Li
Filed: 10 Jun 22
Utility
Storage System and Method for Inference of Read Thresholds Based on Memory Parameters and Conditions
14 Dec 23
A storage system has an inference engine that can infer a read threshold based on a plurality of parameters of the memory.
Eran Sharon, Ariel Navon, Alexander Bazarsky, David Avraham, Nika Yanuka, Idan Alrod, Tsiko Shohat Rozenfeld, Ran Zamir
Filed: 13 Jun 22
Utility
Sense Amplifier Architecture Providing Reduced Program Verification Time
14 Dec 23
Systems and methods are provided for sensing a data state of a memory cell.
HIROKI YABE
Filed: 10 Jun 22
Utility
Semiconductor Wafer Dicing Method
14 Dec 23
A semiconductor die is separated from a semiconductor wafer using a method that involves performing a partial cut on the semiconductor wafer, applying tape lamination to a front side of the semiconductor wafer, grinding a back side of the semiconductor wafer, mounting the semiconductor wafer to a die attach film (DAF) layer, removing the tape lamination from the front side of the semiconductor wafer, and performing a DAF-die separation operation to separate the semiconductor die from the adjacent semiconductor die.
Zhengjie ZHU, Junrong YAN, Chee Keong CHIN, Cheng CHANG, Zhonghua QIAN
Filed: 13 Jun 22
Utility
Data Latch Programming Algorithm for Multi-bit-per-cell Memory Devices
14 Dec 23
A multi-stage method for programming an n-bit memory cell array using a fixed number of data latches is disclosed.
TORU MIWA, Fumiaki Toyama
Filed: 13 Jun 22
Utility
Semiconductor Device Including Reinforcing Blocks
14 Dec 23
A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and reinforcing blocks on the substrate.
Shenghua Huang, Binbin Zheng, Shaopeng Dong, Songtao Lu, Rui Guo, Yangming Liu, Bo Yang, Ning Ye
Filed: 14 Jun 22
Utility
Three-dimensional Memory Device Including Composite Backside Metal Fill Structures and Methods for Forming the Same
14 Dec 23
A three dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate; memory stack structures vertically extending through the alternating stack; and a backside trench fill structure.
Rahul SHARANGPANI, Raghuveer S. MAKALA, Ryo KAMBAYASHI, Fumitaka AMANO
Filed: 10 Jun 22
Utility
Data Storage Device and Method for Enabling Metadata-Based Seek Points for Media Access
14 Dec 23
A data storage device and method for enabling metadata-based seek points for media access are provided.
Ramkumar Ramamurthy, Ramanathan Muthiah
Filed: 14 Jun 22
Utility
Data Storage Device with Dynamic Mapping of Low-density Parity Check (LDPC) Engines
14 Dec 23
The devices, methods, and apparatuses of the present disclosure address a lack of parallelism in a typical approach by eliminating the static mapping of the two or more low-density parity check (LDPC) engines to a plurality of flash controllers.
Dattatreya B Nayak, Karthik N E, Noor Mohamed A A, Yunas Rashid
Filed: 14 Jun 22
Utility
Three-dimensional Memory Device Including Composite Backside Metal Fill Structures and Methods for Forming the Same
14 Dec 23
A three dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate; memory stack structures vertically extending through the alternating stack; and a backside trench fill structure.
Fumitaka AMANO, Ryo KAMBAYASHI
Filed: 10 Jun 22
Utility
Method of handling irregular MetaBlock wear leveling and UGSD boot time improvement
12 Dec 23
The present disclosure generally relates to using irregular MetaBlocks (IRMBs) in both host and control pools.
Kalpit Bordia, Vinayak Bhat, Raghavendra Gopalakrishnan
Filed: 9 Feb 22
Utility
Storage system and method for delaying flushing of a write buffer based on a host-provided threshold
12 Dec 23
A storage system allocates single-level cell (SLC) blocks in its memory to act as a write buffer.
Einav Zilberstein, Hadas Oshinsky, Maayan Suliman
Filed: 4 Feb 22