2736 patents
Page 8 of 137
Utility
RAID stripe allocation based on memory device health
24 Oct 23
Example storage systems, storage devices, and methods provide dynamic redundant array of independent disks (RAID) stripe allocation based on memory device health conditions.
Amit Sharma, Dinesh Kumar Agarwal, Abhinandan Venugopal
Filed: 23 Jun 20
Utility
Flexible accelerator for sparse tensors in convolutional neural networks
24 Oct 23
An apparatus includes a tensor compute cluster having a plurality of tensor compute units to process a plurality of sub-feature maps in a machine learning application and a tensor memory cluster having a plurality of tensor feature map memory units to store the plurality of sub-feature maps.
Kiran Gunnam, Anand Kulkarni, Zvonimir Bandic
Filed: 25 Mar 20
Utility
Program dependent biasing of unselected sub-blocks
24 Oct 23
An apparatus includes a control circuit configured to connect to first word lines of a first vertical sub-block and second word lines of a second vertical sub-block.
Xiang Yang, Deepanshu Dutta, Gerrit Jan Hemink
Filed: 8 Sep 21
Utility
Reducing noise in back EMF sensing for data storage
24 Oct 23
Various illustrative aspects are directed to a data storage device comprising: a voice coil motor (VCM) and one or more processing devices, configured to actuate the VCM, switch on measuring a back electromotive force (BEMF) from the VCM for intervals of an initial BEMF measurement that are free of spikes in the initial BEMF measurement, and process a measured BEMF signal from the intervals of the initial BEMF measurement that are free of spikes in a change of current term of the initial BEMF measurement.
Guoxiao Guo, Jianbin Nie, Triet Tieu, Duc H. Banh, Tianyu Jiang
Filed: 14 Mar 22
Utility
Multi-phased programming with balanced gray coding
24 Oct 23
Disclosed are systems and methods for providing multi-phased programming with balanced Gray coding.
Sergey Anatolievich Gorobets, Xinmiao Zhang, James Fitzpatrick
Filed: 23 Jun 21
Utility
Transfer latch tiers
24 Oct 23
Read and write circuitry, described herein, comprises data latches, each data latch connected to a bit line and arranged in a same column as the bit line; and transfer latches, each transfer latch connected to a data latch and arranged in a same column as the data latch.
Iris Lu, Tai-Yuan Tseng
Filed: 21 Oct 21
Utility
Mitigating neighbor interference to select gates in 3D memory
24 Oct 23
Technology for mitigating interference to select transistors in 3D memory is disclosed.
Xiang Yang, Kou Tei, Ohwon Kwon
Filed: 24 Sep 21
Utility
Non-volatile storage system with hybrid SLC wear leveling
24 Oct 23
Technology is disclosed herein for reducing wear due to erasing and programming non-volatile memory cells.
Vinayak Bhat
Filed: 15 Mar 22
Utility
Ball grid array substrate
24 Oct 23
A semiconductor device package includes an embedded plurality of solder balls within an integrated circuit die (ICD) substrate In one embodiment, the integrated circuit die (ICD) substrate has a top surface and a bottom surface, and a plurality of solder balls at least partially embedded in the ICD substrate, where each of the plurality of solder balls comprises an exposed surface that is substantially flat and parallel planar to the bottom surface, and where the exposed surface of each of the plurality of solder balls is disposed in the bottom surface.
Muhammad Bashir Mansor, Chong Un Tan, Shivaram Sahadevan, Mickaldass Santanasamy, Muhammad Faizul Mohd Yunus, Chin Koon Tang
Filed: 30 Nov 21
Utility
Three-dimensional memory device with separated contact regions and methods for forming the same
17 Oct 23
A memory die includes an alternating stack of insulating layers and electrically conductive layers through which memory opening fill structures vertically extend.
Hiroyuki Ogawa, Fumiaki Toyama
Filed: 9 Aug 21
Utility
Dual sacrificial material replacement process for a three-dimensional memory device and structure formed by the same
17 Oct 23
A vertical repetition of a unit layer stack includes an insulating layer, a first sacrificial material layer, another insulating layer, and a second sacrificial material layer.
Keigo Kitazawa, Naoto Norizuki, Shunsuke Takuma
Filed: 19 Apr 21
Utility
Non-volatile memory with updating of read compare voltages based on measured current
17 Oct 23
A memory system reads data from non-volatile memory cells using a set of read compare voltages to determine which data state the memory cells are in, where each data state is associated with predetermined data values.
Yi Song, Jiahui Yuan, Dengtao Zhao
Filed: 21 Mar 22
Utility
Data storage device with manipulated media mapping to control access latency of data containers
17 Oct 23
Various illustrative aspects are directed to a data storage device, comprising one or more disks; an actuator arm assembly comprising one or more heads, and configured to position the one or more heads proximate to disk surfaces of the one or more disks; and one or more processing devices.
Daniel J. Wade, Scott Burton, Eric B. Smith
Filed: 24 Jun 22
Utility
Data storage device integrating wedge repeatable runout (WRRO) learning into data recovery procedure (DRP)
17 Oct 23
A data storage device comprises a disk having a plurality of data tracks and a plurality of servo wedges wherein the plurality of servo wedges comprise a plurality of wedge repeatable runout (WRRO) fields configured to store a plurality of WRRO compensation values in connection with the plurality of data tracks.
Jim French, Austin Striegel, Gary Herbst, Chuanwen Ji
Filed: 2 Mar 22
Utility
State dependent VPVD voltages for more uniform threshold voltage distributions in a memory device
17 Oct 23
The storage device includes a non-volatile memory with control circuitry and an array of memory cells that are arranged in a plurality of word lines.
Yu-Chung Lien, Huai-yuan Tseng
Filed: 28 Jun 21
Utility
Non-volatile memory with reverse state program
17 Oct 23
A memory system separately programs memory cells connected by a common word line to multiple sets of data states with the set of data states having higher threshold voltage data states being programmed before the set of data states having lower threshold voltage data states.
Ming Wang, Liang Li, Jiahui Yuan
Filed: 22 Sep 21
Utility
Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof
17 Oct 23
A memory-containing die includes a three-dimensional memory array, a memory dielectric material layer located on a first side of the three-dimensional memory array, and memory-side bonding pads.
Kwang-Ho Kim, Masaaki Higashitani, Fumiaki Toyama, Akio Nishida
Filed: 25 Aug 21
Utility
Analyses of surface-mount-technology components using fluorescent-dye penetrants
17 Oct 23
Methods and apparatus for testing solder joints of a PCB assembly using fluorescent-dye penetrants.
John Patrick Burke, Erwan Basiron, Kamarol Azmin Kamaruddin, Muhammad Nizam Bin Ilias
Filed: 10 May 22
Utility
Data storage device and method for file-based interrupt coalescing
17 Oct 23
A data storage device and method for file-based interrupt coalescing are provided.
Judah Gamliel Hahn, Shay Benisty, Ariel Navon
Filed: 29 Sep 21
Utility
Logical to physical mapping management using low-latency non-volatile memory
17 Oct 23
Disclosed are systems and methods for providing logical to physical (L2P) table management using low-latency NVM to reduce solid state drive (SSD) random access memory (RAM) footprint.
Amir Hossein Gholamipour, Mark David Myran, Chandan Mishra, Namhoon Yoo, Jun Tao
Filed: 14 Mar 22