100 patents
Utility
Optical Waveguide Terminators with Doped Waveguides
18 Jan 24
Disclosed herein are methods, structures, apparatus and devices for the termination of unused waveguide ports in planar photonic integrated circuits with doped waveguides such that free-carrier absorption therein may advantageously absorb any undesired optical power resulting in a significant reduction of stray light and resulting reflections.
Long Chen
Filed: 21 Apr 23
Utility
Temperature sensor
2 Jan 24
A system and method of measuring a temperature including applying a first set of voltages across a circuit in sequence; detecting a second set of voltages corresponding to the first set of voltages, wherein the second set of voltages includes a first detected voltage, a second detected voltage, and a third detected voltage, wherein the first applied voltage corresponds to the first detected voltage, the second applied voltage corresponds to the second detected voltage, and a third applied voltage corresponds to the third detected voltage; modifying an output of a heater proximate to the diode within the circuit, wherein a combined heat dissipation of the heater and the diode remains constant during operation of the circuit; and determining a temperature proximate to the diode based on the first set of voltages and the second set of voltages.
Ryan Moore, Christopher Doerr
Filed: 25 Feb 21
Utility
Integration of optical gain subassembly with silicon photonics
19 Dec 23
A system including an optical transceiver, including a first portion of a laser cavity operable to output optical energy; and an optical modulator operable to modulate the optical energy output by the laser; and a temperature-controlled optical gain subassembly optically coupled to the optical transceiver, the optical gain subassembly including a plurality of semiconductor optical amplifiers (SOAs), wherein one SOA of the plurality of SOAs is operable to amplify the optical energy inside a laser cavity.
Christopher Doerr
Filed: 25 Feb 21
Utility
Side channel communication for an optical coherent transceiver
5 Dec 23
A method, system and apparatus for optimizing parameters between two optical coherent transceivers connected via an optical link, including determining performance of a second optical receiver; wherein the second optical transceiver uses a set of parameters; and inputting information into a side channel communication between a first optical transceiver and the second optical transceiver to update the set of parameters for the second transceiver.
Jonas Geyer, Timo Pfau
Filed: 22 Dec 21
Utility
Current balancing of voltage regulators
21 Nov 23
A current-balanced voltage source may include two regulated voltage sources, each having an input and an output, and an amplifier to receive a control voltage at a positive input and a feedback voltage at a negative input.
Yuval Shohet, Robert Manlick
Filed: 25 Aug 21
Utility
Method, system, and apparatus for packet transmission
15 Aug 23
A method, system, and apparatus for parsing incoming frames; classifying the frames by information contained in a header of the ethernet frame; and performing an action on the classification.
Michael Sluyski
Filed: 28 Jan 21
Utility
Methods for adjusting a modulator for optimal power
15 Aug 23
Aspects of the present disclosure provide an optical modulator with linearly distributed active circuitry coupled to a signal electrode to compensate for loss or attenuation of a high frequency modulation signal in the signal electrode.
Ricardo Aroca
Filed: 17 Dec 21
Utility
Skew-correcting clock buffer
11 Jul 23
A method system, and apparatus for adjusting skew in a circuit comprising feeding an input clock into a first push-pull source follower stage, feeding an inverse of an input clock bar into a first CMOS inverter stage, creating an output clock based on an equal contribution of the input clock of the first push-pull follower stage and the inverse of the input clock bar of the first CMOS invert stage, feeding the input clock bar into a first push-pull source follower stage, feeding an inverse of the input clock into a first CMOS inverter stage, and creating an output clock based on an equal contribution of the input clock bar of the first push-pull follower stage and the inverse of the input clock bar of the first CMOS invert stage.
Gavin Allen, Ian Dedic, Bo Yang, Tarun Gupta
Filed: 6 Jun 22
Utility
Impairment generation
4 Jul 23
A method, system, and apparatus for emulating impairments in a communication system.
Antonio Caballero Jambrina, Miquel Mestre Adrover, Pierre Humblet
Filed: 22 Jun 21
Utility
System and Methods for Managing Heat In a Photonic Integrated Circuit
18 May 23
In part, in one aspect, the disclosure relates to a system including a photonic integrated circuit (PIC) assembly, comprising a PIC comprising: a first bond pad disposed inward from an edge of the PIC a first distance; and a first wire having a first length, the first wire electrically connected to the first bond pad and extending therefrom, wherein the first distance is greater than 0.4 mm.
John Heanue
Filed: 20 Jan 23
Utility
Resistivity Engineered Substrate for RF Common-mode Suppression
18 May 23
Aspects of the present disclosure are directed to a photonic integrated circuit (PIC) having a resistivity-engineered substrate to suppress radio-frequency (RF) common-mode signals.
Long Chen, Leonard Jan-Peter Ketelsen
Filed: 6 Jan 23
Utility
Optical waveguide terminators with doped waveguides
16 May 23
Disclosed herein are methods, structures, apparatus and devices for the termination of unused waveguide ports in planar photonic integrated circuits with doped waveguides such that free-carrier absorption therein may advantageously absorb any undesired optical power resulting in a significant reduction of stray light and resulting reflections.
Long Chen
Filed: 21 Dec 16
Utility
Wavelength locker
4 Apr 23
An apparatus and method for calculating the frequency of the light.
Long Chen, Christopher Doerr
Filed: 9 Nov 20
Utility
Flexible baud rate
4 Apr 23
A method, system, and apparatus enabled to selectively choose a baud rate for communication of optical data using a modem enabled to operate with an optical signal modulated at plurality of finely tuned baud rates.
Jonas Geyer
Filed: 24 Jun 21
Utility
Clock synchronization
14 Mar 23
A method, system, and apparatus for determining delay between clocks, in response to a trigger event, buffering DSP symbol information in a symbol capture buffer; wherein the amount of DSP symbol information buffered corresponds to the amount of symbols captured during a buffer storage interval; and extracting a synchronization packet from the symbol capture buffer.
James Duda, Jon Stahl, Kevin Hinchey
Filed: 24 Apr 20
Utility
Distributed voltage controlled oscillator (VCO)
7 Mar 23
In a first and second embodiment, an apparatus and system comprising a set of voltage controlled oscillators (VCOs); wherein each VCO of the set of VCOs has an LC tank; wherein each VCO of the set of VCOs is connected via a transmission line.
Ian Dedic, David Enright, Tarun Gupta
Filed: 30 Sep 19
Utility
Polarization Diversified Wavelength Domain De Multiplexer with a Single Set of Outputs
23 Feb 23
In part, the disclosure relates to system.
Long Chen
Filed: 20 Aug 21
Utility
Forward Error Correction Systems and Methods
9 Feb 23
Techniques for performing forward error correction of data to be transmitted over an optical communications channel.
Pierre Humblet
Filed: 24 Oct 22
Utility
System and methods for managing heat in a photonic integrated circuit
24 Jan 23
In part, in one aspect, the disclosure relates to a system including a photonic integrated circuit (PIC) assembly, comprising a PIC comprising: a first bond pad disposed inward from an edge of the PIC a first distance; and a first wire having a first length, the first wire electrically connected to the first bond pad and extending therefrom, wherein the first distance is greater than 0.4 mm.
John Heanue
Filed: 15 Jul 20
Utility
Clock skew calibration for time interleaved ADCS
24 Jan 23
A method and apparatus for determining a set of cascading clock cycles, the method comprising inputting a set of phase changes of a set of clocks into a set of input circuits; wherein the set of phase changes are either falling phase changes or rising phase changes; wherein two phase changes of the set of clocks are fed into each input circuit of the set of input circuits, determining for each input circuit of the set of input circuits a duty cycle, storing the duty cycle for each input circuit of the input circuits in a set of duty cycles, calculating skew between the set of clocks using the duty cycles, and adjusting a delay to lower the skew between the set of clocks.
Ramesh K. Singh, Tarun Gupta, Guojun Ren, Richard Castell
Filed: 22 Jun 20