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AMD Advanced Micro Devices

1173 patents

Page 4 of 59
APP
Utility
Memory Operations Using Compound Memory Commands
21 Oct 21
Memory operations using compound memory commands, including: receiving, by a memory module, a compound memory command indicating one or more operations to be applied to each portion of a plurality of portions of contiguous memory in the memory module; generating, based on the compound memory command, a plurality of memory commands to apply the one or more operations to each portion of the plurality of portions of contiguous memory; and executing the plurality of memory commands.
ANIRBAN NAG, NUWAN JAYASENA, SHAIZEEN AGA
Filed: 15 Apr 20
APP
Utility
Method and Apparatus for Directing Application Requests for Rendering
21 Oct 21
A method and system for directing image rendering, implemented in a computer system including a plurality of processors includes determining one or more processors in the system on which to execute one or more commands.
Gregory A. Grebe, Jonathan Lawrence Campbell, Layla A. Mah
Filed: 30 Jun 21
APP
Utility
Hardware-assisted Dynamic Random Access Memory (Dram) Row Merging
21 Oct 21
Hardware-assisted Dynamic Random Access Memory (DRAM) row merging, including: identifying, by a memory controller, in a DRAM module, a plurality of rows storing identical data; storing, in a mapping table, data mapping one or more rows of the plurality of rows to another row; and excluding the one or more rows from a refresh the DRAM module.
JAGADISH B. KOTRA
Filed: 18 Sep 20
GRANT
Utility
Selecting a precision level for executing a workload in an electronic device
19 Oct 21
An electronic device includes a controller functional block and a computational functional block.
Anthony T. Gutierrez, Sergey Blagodurov, Scott A. Moe, Xianwei Zhang, Jieming Yin, Matthew D. Sinclair
Filed: 9 Apr 18
GRANT
Utility
Data communications with enhanced speed mode
19 Oct 21
An interconnect controller includes a data link layer controller coupled to a transaction layer, wherein the data link layer controller selectively receives data packets from and sends data packets to the transaction layer, and a physical layer controller coupled to the data link layer controller and to a communication link.
Gordon Caruk, Gerald R. Talbot
Filed: 14 Dec 18
GRANT
Utility
Termination calibration scheme using a current mirror
19 Oct 21
Systems, apparatuses, and methods for conveying and receiving information as electrical signals in a computing system are disclosed.
Achal Kathuria, Pradeep Jayaraman
Filed: 13 Sep 19
GRANT
Utility
Gradient texturing compression codec
19 Oct 21
Systems, apparatuses, and methods for performing computation-efficient encoding of video or image frames are disclosed.
Navin Patel
Filed: 27 Apr 18
APP
Utility
Identifying and Configuring Compatible Versions of Runtime Components by Shared Libraries
14 Oct 21
An electronic device includes a processor and a storage device having a file system with a plurality of directories.
Srinivasan Subramanian, Pruthvi K. Madugundu, Freddy Paul, Jagadish Krishnamoorthy, Diwakar Das, Praveen K. Jain
Filed: 14 Apr 20
APP
Utility
Deep Learning Acceleration of Physics-based Modeling
14 Oct 21
Values of physical variables that represent a first state of a first physical system are estimated using a deep learning (DL) algorithm that is trained based on values of physical variables that represent states of other physical systems that are determined by one or more physical equations and subject to one or more conservation laws.
Nicholas Penha MALAYA, Abhinav VISHNU, Octavi OBIOLS SALES
Filed: 31 Aug 20
APP
Utility
Energy Efficient Adaptive Data Encoding Method and Circuit
14 Oct 21
Various energy efficient data encoding schemes and computing devices are disclosed.
GREG SADOWSKI, JOHN KALAMATIANOS
Filed: 15 Jun 21
GRANT
Utility
Analysis of electro-optic waveforms
12 Oct 21
An optic probe is used to measure signals from a device under test.
Venkat Krishnan Ravikumar, Nathan Linarto, Wen Tsann Lua, Abel Tan Yew Hong, Shei Lay Phoa, Gopinath Ranganathan, Jiann Minn Chin
Filed: 25 Sep 19
GRANT
Utility
Data compression system using base values and methods thereof
12 Oct 21
In some embodiments, a memory controller in a processor includes a base value cache, a compressor, and a metadata cache.
SeyedMohammad Seyedzadehdelcheh, Xianwei Zhang, Bradford Beckmann, Shomit N. Das
Filed: 23 Dec 19
GRANT
Utility
Retire queue compression
12 Oct 21
Systems, apparatuses, and methods for compressing multiple instruction operations together into a single retire queue entry are disclosed.
Matthew T. Sobel, Joshua James Lindner, Neil N. Marketkar, Kai Troester, Emil Talpes, Ashok Tirupathy Venkatachar
Filed: 27 Sep 19
GRANT
Utility
Processor microcode with embedded jump table
12 Oct 21
A processing unit employs microcode wherein the jump table associated with the microcode is embedded in the microcode itself.
Alexander Fuad Ashkar, Rakan Khraisha, Rex Eldon McCrary, Harry J. Wise
Filed: 31 May 19
GRANT
Utility
Soft watermarking in thread shared resources implemented through thread mediation
12 Oct 21
Techniques for use in a microprocessor core for soft watermarking in thread shared resources implemented through thread mediation.
Kai Troester
Filed: 27 Sep 19
GRANT
Utility
Quality of service for input/output memory management unit
12 Oct 21
A data processing system includes a memory, a group of input/output (I/O) devices, an input/output memory management unit (IOMMU).
Arkaprava Basu, Michael LeBeane, Eric Van Tassell
Filed: 13 Jun 18
GRANT
Utility
Dynamic scaling of content luminance and backlight
12 Oct 21
A method for dynamic scaling of content luminance and backlight level includes determining, using one or more processors of a display system, an ambient light level of a local environment proximate the display system.
Anthony W L Koo, Syed Athar Hussain, Krunoslav Kovac
Filed: 28 Sep 18
APP
Utility
Store-to-load Forwarding
7 Oct 21
An arithmetic unit performs store-to-load forwarding based on predicted dependencies between store instructions and load instructions.
Gregory W. Smaus, Francesco Spadini, Matthew A. Rafacz, Michael Achenbach, Christopher J. Burke, Emil Talpes, Matthew M. Crum
Filed: 19 May 21
APP
Utility
Real Time On-chip Texture Decompression Using Shader Processors
7 Oct 21
A processing unit, method, and medium for decompressing or generating textures within a graphics processing unit (GPU).
Konstantine Iourcha, John W. Brothers
Filed: 21 Jun 21
APP
Utility
Interconnect Architecture for Three-dimensional Processing Systems
7 Oct 21
A processing system includes a plurality of processor cores formed in a first layer of an integrated circuit device and a plurality of partitions of memory formed in one or more second layers of the integrated circuit device.
Nuwan S. JAYASENA, Yasuko ECKERT
Filed: 7 Apr 21
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