2587 patents
Page 6 of 130
Utility
Anti-resonance structure for dampening die package resonance
19 Dec 23
A power delivery network, circuit, and method reduce die package resonance of an integrated circuit (IC) die.
Fei Guo
Filed: 24 Jun 21
Utility
Techniques for Power Savings, Improved Security, and Enhanced User Perceptual Audio
14 Dec 23
A technique for operating a device is disclosed.
Eswar Chandra Saranu
Filed: 14 Jun 22
Utility
Multi-gpu Device Pcie Topology Retrieval In Guest VM
14 Dec 23
A system and method for efficiently scheduling tasks to multiple endpoint devices are described.
Yinan Jiang, Shaoyun Liu
Filed: 14 Jun 22
Utility
Memory Pools In a Memory Model for a Unified Computing System
14 Dec 23
A method and system for providing memory in a computer system.
Anthony Asaro, Kevin Normoyle, Mark Hummel
Filed: 24 Aug 23
Utility
Method for Embedding Rows Prefetching In Recommendation Models
14 Dec 23
A system and method for efficiently accessing sparse data for a workload are described.
Mohamed Assem Abd ElMohsen Ibrahim, Onur Kayiran, Shaizeen Dilawarhusen Aga, Yasuko Eckert
Filed: 8 Jun 22
Utility
Adaptive Decoder-Driven Encoder Reconfiguration
14 Dec 23
Adaptive decoder-drive encoder reconfiguration techniques are described.
Ihab Amer, Gabor Sines, Haibo Liu, Khaled Mammou, Arun Sundaresan Iyer
Filed: 13 Jun 22
Utility
Adaptive audio mixing
12 Dec 23
Systems, apparatuses, and methods for performing adaptive audio mixing are disclosed.
Carl Kittredge Wakeland, Mehdi Saeedi, Thomas Daniel Perry, Gabor Sines
Filed: 23 Dec 20
Utility
GPU chiplets using high bandwidth crosslinks
12 Dec 23
A chiplet system includes a central processing unit (CPU) communicably coupled to a first GPU chiplet of a GPU chiplet array.
Skyler J. Saleh, Samuel Naffziger, Milind S. Bhagavat, Rahul Agarwal
Filed: 28 Jun 19
Utility
Controlling the operating speed of stages of an asynchronous pipeline
12 Dec 23
An asynchronous pipeline includes a first stage and one or more second stages.
Greg Sadowski, John Kalamatianos, Shomit N. Das
Filed: 26 Jun 20
Utility
Multi-modal gather operation
12 Dec 23
An apparatus includes a plurality of load buses and a load store unit that includes a plurality of load ports to access the plurality of load buses.
John M. King, Magiting Talisayon, Michael Estlick
Filed: 27 Sep 19
Utility
Hypervisor secure event handling at a processor
12 Dec 23
A virtualized computing environment is protected from a malicious hypervisor by restricting the hypervisor's access to one or more portions of an event (interrupt or exception) handling pathway of a guest virtual machine, wherein the guest virtual machine includes both a secure layer to manage security for the guest and one or more non-secure layers to handle event processing.
David Kaplan, Jelena Ilic
Filed: 12 Dec 19
Utility
Slave-to-master data and out-of-sequence acknowledgements on a daisy-chained bus
12 Dec 23
A reporting device communicates with a master device by a first component and a daisy-chained second component.
Eric D. Meyer, Nima Osqueizadeh
Filed: 10 Jun 21
Utility
Video encode pre-analysis bit budgeting based on context and features
12 Dec 23
Systems, apparatuses, and methods for bit budgeting in video encode pre-analysis based on context and features are disclosed.
Mehdi Saeedi, Boris Ivanovic
Filed: 6 Dec 19
Utility
Texture decompression techniques
12 Dec 23
A system and method for texture decompression is described.
Konstantine Iourcha, Andrew S.C. Pomianowski
Filed: 19 Jan 23
Utility
System and Method for Application Migration for a Dockable Device
7 Dec 23
Described is a method and apparatus for application migration between a dockable device and a docking station in a seamless manner.
Jonathan Lawrence Campbell, Yuping Shen
Filed: 11 Aug 23
Utility
Three-stage Differential Ring Oscillator Generating Differential In-phase and Quadrature-phase Clocks
7 Dec 23
A three-stage differential ring oscillator circuit has a first differential stage, a second differential stage, and a third differential stage and generates six phases (two in each stage) used to form differential in-phase and quadrature-phase clock signals.
Thomas H. Likens, Gerald R. Talbot
Filed: 2 Jun 22
Utility
Method and Apparatus to Expedite System Services Using Processing-in-memory (Pim)
7 Dec 23
An apparatus configured for offloading system service tasks to a processing-in-memory (“PIM”) device includes an agent configured to: receive, from a host processor, a request to offload a memory task associated with a system service to the PIM device; determine at least one PIM command and at least one memory page associated with the host processor based upon the request; and issue the at least one PIM command to the PIM device for execution by the PIM device to perform the memory task upon the at least one memory page.
JAGADISH B. KOTRA, KISHORE PUNNIYAMURTHY
Filed: 1 Jun 22
Utility
Register Based Simd Lookup Table Operations
7 Dec 23
An approach is provided for implementing register based single instruction, multiple data (SIMD) lookup table operations.
Gabriel H. Loh, Yasuko Eckert, Bradford Beckmann, Michael Estlick, Jay Fleischman
Filed: 6 Jun 22
Utility
Using Sub-Networks Created from Neural Networks for Processing Color Images
7 Dec 23
A system comprising an electronic device that includes a processor is described.
Sudhanva Gurumurthi, Abhinav Vishnu
Filed: 22 Aug 23
Utility
Semiconductor chip stack with locking through vias
5 Dec 23
Various semiconductor chips and chip stack arrangements are disclosed.
Travis Boraten
Filed: 23 Jul 20