439 patents
Page 3 of 22
Utility
Method of Cache Prefetching That Increases the Hit Rate of a Next Faster Cache
25 Nov 21
The size of a cache is modestly increased so that a short pointer to a predicted next memory address in the same cache is added to each cache line in the cache.
Shay Gal-On, Srilatha Manne, Edward McLellan, Alexander Rucker
Filed: 3 Aug 21
Utility
Power management and transitioning cores within a multicore system from idle mode to operational mode over a period of time
23 Nov 21
A system includes a plurality of cores.
Chia-Hsin Chen, Avinash Sodani, Atul Bhattarai, Srinivas Sripada
Filed: 31 Jul 20
Utility
Decoding of high-density memory cells in a solid-state drive
23 Nov 21
A method of decoding data from high density memory includes reading voltage levels from a first memory cell and a set of one or more neighboring memory cells of flash memory in response to a read command with an address corresponding to the first memory cell, inputting the voltage levels into a trained model that has been trained on the flash memory to estimate bit values written to a memory cell based on respective voltage values read from the first memory cell and from the neighboring memory cells according to a layout of memory cells of the flash memory, obtaining from the trained model an estimated bit value written to the first memory cell based on the respective voltage levels of the first memory cell and the neighboring memory cells having been input into the trained model, and outputting the estimated hit value in response to the read command.
B Hari Ram, Vijay Ahirwar, Sri Varsha Rottela, Nilesh N. Khude
Filed: 20 Feb 20
Utility
Method and apparatus for longest prefix match search
16 Nov 21
A network device includes a memory configured to store a plurality of entries in respective locations in the memory, the plurality of entries corresponding to a trie data structure for performing a longest prefix match search.
Ziv Zamsky, Ilan Mayer-Wolf, Yakov Tokar
Filed: 22 Aug 19
Utility
Managing potential faults for speculative page table access
16 Nov 21
A pipeline in a processor core includes: at least one stage that decodes instructions including load instructions that retrieve data stored at respective virtual addresses, at least one stage that issues at least some decoded load instructions out-of-order, and at least one stage that initiates at least one prefetch operation.
Shubhendu Sekhar Mukherjee, David Albert Carlson, Michael Bertone
Filed: 6 Aug 19
Utility
Methods and apparatus for providing soft and blind combining for PUSCH acknowledgement (ACK) processing
16 Nov 21
Methods and apparatus for providing soft and blind combining for PUSCH acknowledgement (ACK) processing.
Sabih Guzelgoz, Hong Jik Kim, Tejas Maheshbhai Bhatt, Fariba Heidari
Filed: 25 Sep 19
Utility
Marking Packets Based on Egress Rate to Indicate Congestion
11 Nov 21
A network device includes a rate measurement circuit that is configured to measure respective egress rates at which respective data is being transmitted via respective ports associated with the network device.
Gideon NAVON, Rami ZEMACH, Yaron KITTNER
Filed: 6 May 21
Utility
Egress Packet Processing Using a Modified Packet Header Separate from a Stored Payload
11 Nov 21
A network device includes a packet processor that: determines at least one egress port via which a received packet is to be transmitted by the network device; modifies one or more fields in a header of the packet to generate a modified header; determines, based at least in part on the modified header, whether the packet a) is to be transmitted or b) is to be discarded; and stores the modified header in a packet memory.
David MELMAN, Ilan MAYER-WOLF, Carmi ARAD, Rami ZEMACH
Filed: 23 Jul 21
Utility
Ethernet PHY-MAC communication with in-band wake-up/sleep commands
9 Nov 21
An Ethernet communication device includes a data interface and circuitry.
Dance Wu, Christopher Mash, Daryl J. Hoot, Hong Yu Chou
Filed: 7 Apr 20
Utility
IC chip package with dummy solder structure under corner, and related method
9 Nov 21
An IC chip package includes a substrate having a plurality of interconnect metal pads, and a chip having a plurality of interconnect metal pads arranged thereon.
Manish Nayini, Richard S. Graf, Janak G. Patel, Nazmul Habib
Filed: 24 Oct 19
Utility
Physical layer frame format for WLAN
2 Nov 21
A first communication device generates a physical layer (PHY) preamble for a PHY data unit to be transmitted via a communication channel, the PHY data unit conforming to a first communication protocol.
Hongyuan Zhang, Mingguang Xu, Yakun Sun
Filed: 13 May 19
Utility
Methods and apparatus for secure fine timing measurement with encoded long training fields
2 Nov 21
The present disclosure describes methods and apparatuses for secure fine timing measurement (FTM) with encoded long training fields (LTFs).
Christian Raimund Berger, Liwen Chu, Sudhir Srinivasa, Niranjan Grandhe
Filed: 11 Jun 18
Utility
Hybrid FIFO buffer
26 Oct 21
A first-in/first-out (FIFO) buffer includes at least one latch-based FIFO storage line, an input flip-flop stage upstream of the at least one latch-based storage line, an output flip-flop stage downstream of the at least one latch-based storage line.
Lior Moheban, Alex Pinskiy, Yakov Tokar
Filed: 27 Jan 20
Utility
High efficiency long training field symbol transmission for multiple transmission streams
26 Oct 21
Embodiments described herein provide a system for transmitting high efficiency long term training field (HE-LTF) symbols for multiple wireless spatial streams over a wireless channel.
Ankit Sethi, Sayak Roy, Hari Ram Balakrishnan, Sudhir Srinivasa
Filed: 18 Sep 19
Utility
Hybrid packet memory for buffering packets in network devices
26 Oct 21
A network device processes received packets at least to determine port or ports of the network device via which to transmit the packet.
Gideon Navon, Zvi Shmilovici Leib, Carmi Arad
Filed: 20 Nov 18
Utility
Method and apparatus for testing a multi-die integrated circuit device
12 Oct 21
A method for scan chain testing a multi-chip module including a plurality of integrated circuit dice, some of the integrated circuit dice being of a first type and some of the integrated circuit dice being of a second type, includes separately applying a first boundary scan test stream to each die of the first type, and a second boundary scan test stream to each die of the second type.
Michael Fridburg, Erez Menahem, Peter Brokhman
Filed: 26 Sep 19
Utility
Systems and methods for dynamic configuration of a device clock
12 Oct 21
This disclosure describes a programmable clock configuration block disposed at the SoC system, which manages clock frequency change flow in a single clock domain on a SoC system to provide dynamic clock frequency configuration while the SoC system is in operation.
Nir Ofir, Jonatan Bar-Asher, Dror Egozi, Erez Diamant
Filed: 22 Jan 19
Utility
Range extension mode for WiFi
12 Oct 21
A communication device generates a transmission signal for transmission via a wireless communication channel, wherein the transmission signal corresponds to a physical layer (PHY) data unit that conforms to a range extension mode of a first communication protocol.
Hongyuan Zhang, Hui-Ling Lou, Su Khiong Yong
Filed: 19 Aug 19
Utility
Mobile storage system for storing and transferring data generated by Internet of Things (IoT) devices
28 Sep 21
A mobile storage system receives, by a short range network interface, data from an internet of things (IoT) device.
Runzi Chang
Filed: 18 Sep 19
Utility
Systems and methods for generating and transmitting short low power wake-up request (WUR) frames in a wireless communication system
28 Sep 21
Embodiments described herein provide a method for creating a low power wake-up radio frame.
Liwen Chu, Hongyuan Zhang, Hui-Ling Lou
Filed: 31 Jan 19